[AK4372]
SYSTEM DESIGN
Figure 50 shows the system connection diagram. The evaluation board [AKD4372] demonstrates the optimum layout,
power supply arrangements and measurement results.
Digital Ground
Analog Ground
µP
1µ
VSS2
VCOC
MCKI
CCLK
CSN
PDN
MUTET
ROUT
VCOM
AVDD
VSS1
Rp
Cp
MCKO
CDTI
LOUT
AK4372ECB
SPK-Amp
+
1000p
2.2µ
LRCK
DVDD
I2C
Audio
Top View
Analog Supply
10
Controller
+
1.6∼3.6V
10µ
BICK
RIN
LIN
HPR
0.1µ
0.1µ
SDATA
MIN
HPL
+
+
220µ
220µ
16Ω
16Ω
Headphone
Notes:
- VSS1 and VSS2 of the AK4372 should be distributed separately from the ground of external controllers.
- All digital input pins (I2C, SDA/CDTI, SCL/CCLK, CAD0/CSN, SDATA, LRCK, BICK, MCKI, PDN) must
not be left floating.
- When the AK4372 is in EXT mode (PMPLL bit = “0”), a resistor and capacitor for the VCOC pin are not
needed.
- When the AK4372 is in PLL mode (PMPLL bit = “1”), a resistor and capacitor for the VCOC pin are shown in
Table 4
- When the AK4372 is used in master mode, LRCK and BICK pins are floating before the M/S bit is changed to
“1”. Therefore, a 100kΩ pull-up resistor should be connected to the LRCK and BICK pins of the AK4372.
- When DVDD is supplied from AVDD via 10Ω series resistor, the capacitor larger than 0.1μF should not be
connected between DVDD and the ground.
Figure 50. Typical Connection Diagram (In case of AC coupling to MCKI)
MS0684-E-02
2008/12
- 59 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
