[AK4372]
PIN/FUNCTION
No.
A1
B2
B3
A3
C3
Pin Name
SDATA
BICK
LRCK
MCKI
DVDD
I/O
I
I/O
I/O
I
-
Function
Audio Serial Data Input Pin
Audio Serial Data Clock Pin
Input / Output Channel Clock Pin
External Master Clock Input Pin
Digital Power Supply Pin, 1.6
∼
3.6V
Output for Loop Filter of PLL Circuit
A4 VCOC
O
This pin must be connected to VSS2 with one resistor and one capacitor in series.
A5 VSS2
-
Ground 2 Pin. Connected to VSS1.
B4 MCKO
O
Master Clock Output Pin
SDA
I/O Control Data Input/Output Pin (I2C mode : I2C pin = “H”)
C4
CDTI
I
Control Data Input Pin (3-wire serial mode : I2C pin = “L”)
SCL
I
Control Data Clock Pin (I2C mode : I2C pin = “H”)
B5
CCLK
I
Control Data Clock Pin (3-wire serial mode : I2C pin = “L”)
CAD0
I
Chip Address 0 Select Pin (I2C mode : I2C pin = “H”)
C5
CSN
I
Chip Select Pin (3-wire serial mode : I2C pin = “L”)
Power-down & Reset
D5 PDN
I
When “L”, the AK4372 is in power-down mode and is held in reset.
The AK4372 must be reset once upon power-up.
Control Mode Select Pin
D3 I2C
I
“H”: I
2
C Bus, “L”: 3-wire Serial
Mute Time Constant Control pin
E5 MUTET
O
Connected to the VSS1 pin with a capacitor for mute time constant.
D4 LOUT
O
Lch Stereo Line Output Pin
E4 ROUT
O
Rch Stereo Line Output Pin
Common Voltage Output Pin
E3 VCOM
O
Normally connected to the VSS1 pin with a 2.2μF electrolytic capacitor.
E2 AVDD
-
Analog & PLL Power Supply Pin, 1.6
∼
3.6V
E1 VSS1
-
Ground 1 Pin
D2 HPR
O
Rch Headphone Amp Output
D1 HPL
O
Lch Headphone Amp Output
C1 MIN
I
Mono Analog Input Pin
I
Rch Analog Input Pin (LDIF bit =“0” : Single-ended Input)
RIN
B1
IN+
I
Positive Line Input Pin (LDIF bit =“1” : Full-differential Input)
LIN
I
Rch Analog Input Pin (LDIF bit =“0” : Single-ended Input)
C2
I
Negative Line Input Pin (LDIF bit =“1” : Full-differential Input )
IN−
Note 1. All digital input pins (I2C, SDA/CDTI, SCL/CCLK, CAD0/CSN, SDATA, LRCK, BICK, MCKI, PDN) must not
be left floating. The MCKI pin can be left floating only when the PDN pin = “L”.
MS0684-E-02
-5-
2008/12
AKM [ ASAHI KASEI MICROSYSTEMS ]
