2
The HCPL-M600/01/11 are
suitable for high speed logic
interfacing, input/output
buffering, as line receivers in
environments that conventional
line receivers cannot tolerate, and
are recommended for use in
extremely high ground or induced
noise environments.
Applications
• Isolated Line Receiver
• Simplex/Multiplex Data
Transmission
• Computer-Peripheral
Interface
• Microprocessor System
Interface
• Digital Isolation for A/D, D/A
Conversion
• Switching Power Supply
• Instrument Input/Output
Isolation
• Ground Loop Elimination
• Pulse Transformer
Replacement
Outline Drawing (JEDEC MO-155)
ANODE 1
4.4 ± 0.1
(0.173 ± 0.004)
6
V
CC
MXXX
XXX
7.0 ± 0.2
(0.276 ± 0.008)
CATHODE 3
5 V
OUT
4
GND
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
0.102 ± 0.102
(0.004 ± 0.004)
0.15 ± 0.025
(0.006 ± 0.001)
7° MAX.
1.27 BSG
(0.050)
0.71 MIN.
(0.028)
MAX. LEAD COPLANARITY
= 0.102 (0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
* MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006)
"Agilent" IS MARKED ON THE
UNDERSIDE OF THE PACKAGE
2.5 ± 0.1
(0.098 ± 0.004)
Pin Location
(for reference only)
4.4
(0.17)
0.3
(0.01)
Schematic
+
1
I
O
5
I
F
I
CC
6
V
CC
V
O
2.5
(0.10)
1.3
(0.05)
–
3
HCPL-M601/11 SHIELD
4
GND
0.9
(0.04)
7.2
(0.28)
0.5
(0.02)
USE OF A 0.1 µF BYPASS CAPACITOR
MUST BE CONNECTED BETWEEN PINS
6 AND 4 (SEE NOTE 1).
TRUTH TABLE
(POSITIVE LOGIC)
OUTPUT
LED
L
ON
H
OFF