欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADNS-3040 参数 Datasheet PDF下载

ADNS-3040图片预览
型号: ADNS-3040
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗鼠标传感器 [Ultra Low-Power Mouse Sensor]
分类和应用: 模拟IC传感器信号电路光电二极管
文件页数/大小: 26 页 / 340 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
 浏览型号ADNS-3040的Datasheet PDF文件第8页浏览型号ADNS-3040的Datasheet PDF文件第9页浏览型号ADNS-3040的Datasheet PDF文件第10页浏览型号ADNS-3040的Datasheet PDF文件第11页浏览型号ADNS-3040的Datasheet PDF文件第13页浏览型号ADNS-3040的Datasheet PDF文件第14页浏览型号ADNS-3040的Datasheet PDF文件第15页浏览型号ADNS-3040的Datasheet PDF文件第16页  
Write Operation
Write operation, defined as
data going from the micro-
controller to the ADNS-3040,
is always initiated by the
micro-controller and consists
of two bytes. The first byte
contains the address (seven
bits) and has a “1” as its MSB
to indicate data direction. The
second byte contains the data.
The ADNS-3040 reads MOSI
on rising edges of SCLK.
Read Operation
A read operation, defined as
data going from the ADNS-
3040 to the micro-controller, is
always initiated by the micro-
controller and consists of two
bytes. The first byte contains
the address, is sent by the
micro-controller over MOSI,
and has a “0” as its MSB to
indicate data direction. The
second byte contains the data
and is driven by the ADNS-
3040 over MISO. The sensor
outputs MISO bits on falling
edges of SCLK and samples
MOSI bits on every rising edge
of SCLK.
SCLK
t
HOLD MISO
t
DLY - MISO
MISO
D
0
Figure 16. MISO Delay and Hold Time
NOTE:
The 0.5/f
SCLK
minimum high state of SCLK is
also the minimum MISO data hold time of the
ADNS-3040. Since the falling edge of SCLK is
actually the start of the next read or write
command, the ADNS-3040 will hold the state of
data on MISO until the falling edge of SCLK.
NCS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
SCLK
MOSI
MISO
1
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
A
6
MOSI Driven by Micro Controller
Figure 13. Write Operation
SCLK
MOSI
t
Hold,MOSI
t
setup,MOSI
Figure 14. MOSI Setup and Hold Time
NCS
SCLK
Cycle #
SCLK
MOSI
MISO
0
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Figure 15. Read Operation
t
SRAD delay
12