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T9000 参数 Datasheet PDF下载

T9000图片预览
型号: T9000
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN网络终端节点( NTN )设备 [ISDN Network Termination Node (NTN) Device]
分类和应用: 综合业务数字网
文件页数/大小: 126 页 / 1581 K
品牌: AGERE [ AGERE SYSTEMS ]
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T9000  
Preliminary Data Sheet  
November 2000  
ISDN Network Termination Node (NTN) Device  
10 GCI+ Interface Module (continued)  
10.7 GCI+ Register Set (continued)  
The following registers are only relevant in GCI mode, with the exception of GCIR[GWUP] and GCIE[GWUPE].  
Table 83. GCDMD: GCI Downstream (Transmit) Monitor Data (0x31)  
Reg  
R/W  
Bit 7  
DMD7  
1
Bit 6  
DMD6  
1
Bit 5  
DMD5  
1
Bit 4  
DMD4  
1
Bit 3  
DMD3  
1
Bit 2  
DMD2  
1
Bit 1  
DMD1  
1
Bit 0  
DMD0  
1
GCDMD  
W
RESET Default  
Bit # Symbol  
Name/Description  
7—0 DMD[7:0] Downstream Monitor Data. For any multibyte monitor message, all message bytes except  
the last one are written to this register for transmission on the downstream monitor channel  
(see Section 10.3.2, Monitor Message Transfer). The DMRDY interrupt bit provides an indica-  
tion that a new byte may be loaded.  
Table 84. GCDML: GCI Downstream (Transmit) Monitor Data Last (0x32)  
Reg  
R/W  
Bit 7  
DML7  
1
Bit 6  
DML6  
1
Bit 5  
DML5  
1
Bit 4  
DML4  
1
Bit 3  
DML3  
1
Bit 2  
DML2  
1
Bit 1  
DML1  
1
Bit 0  
DML0  
1
GCDML  
W
RESET Default  
Bit # Symbol  
Name/Description  
7—0 DML[7:0] Downstream Monitor Last. The last byte of a downstream monitor message is written to this  
register for transmission on downstream monitor channel (see Section 10.3.2, Monitor Mes-  
sage Transfer). The DMRDY interrupt bit provides an indication that a new byte may be  
loaded.  
Table 85. GCUMD: GCI Upstream (Receive) Monitor Data (0x33)  
Reg  
R/W  
Bit 7  
UMD7  
Bit 6  
UMD6  
Bit 5  
UMD5  
Bit 4  
UMD4  
Bit 3  
UMD3  
Bit 2  
UMD2  
Bit 1  
UMD1  
Bit 0  
UMD0  
GCUMD  
W
RESET Default  
Bit #  
Symbol  
Name/Description  
7—0  
UMD[7:0]  
Upstream Monitor Channel Received Data. The most recent successfully received byte  
of an upstream monitor message is made available in this register (see Section 10.3.2,  
Monitor Message Transfer). The UMRDY interrupt bit provides an indication that a new  
byte has been received.  
Lucent Technologies Inc.  
81  
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