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T9000 参数 Datasheet PDF下载

T9000图片预览
型号: T9000
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN网络终端节点( NTN )设备 [ISDN Network Termination Node (NTN) Device]
分类和应用: 综合业务数字网
文件页数/大小: 126 页 / 1581 K
品牌: AGERE [ AGERE SYSTEMS ]
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T9000  
Preliminary Data Sheet  
November 2000  
ISDN Network Termination Node (NTN) Device  
10 GCI+ Interface Module (continued)  
10.7 GCI+ Register Set (continued)  
Table 81. GCOF1: GCI PFS1 Offset Select (0x2F)  
Reg  
R/W  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
OFF13  
0
Bit 2  
OFF12  
0
Bit 1  
OFF11  
0
Bit 0  
OFF10  
0
GCOF1  
R/W  
GTMODE G_R_LBK G_L_LBK OFF14  
RESET Default  
0
0
0
0
Bit #  
Symbol  
Name/Description  
GCI Time-Out Mode. (Only Applicable on GCI-NT and GCI-TE Operation Modes.)  
Enables the GCI time-out mechanism.  
7
GTMODE  
0: Time-out mechanism disabled.  
1: Time-out mechanism enabled (abort after three TNR or RNRs), (0.5 ms since the  
beginning of transmission).  
6
5
G_R_LBK  
G_L_LBK  
OFF1[4:0]  
GCI Remote Loopback.  
0: Normal operation.  
1: Upstream B1- and B2-channel data on the GCI is internally looped back to the  
downstream GCI. Loopback is transparent, except when G_L_LBK is asserted at  
the same time.  
GCI Local Loopback.  
0: Normal operation.  
1: Downstream B1- and B2-channel data on the GCI is internally looped back to the  
upstream GCI. Loopback is transparent, except when G_R_LBK is asserted at the  
same time.  
Offset of PS1. Determines the number of channel slots by which PFS1 (B1 channel) is  
offset from the first time slot of the frame.  
4—0  
Table 82. GCOF2: GCI PFS2 Offset Select (0x30)  
Reg  
R/W  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
GCOF2  
R/W  
U_FORCE_B2DN U_FORCE_B1DN  
OFF24 OFF23 OFF22 OFF21 OFF20  
RESET Default  
0
0
0
0
0
0
0
0
Bit #  
Symbol  
Name/Description  
7
U_FORCE_B2DN Microcontroller Access to Downstream B2 Channel. When this bit is set, the  
microcontroller can access the downstream B2-channel data from the U-interface to  
the GCI via the register B2DN (0x54) assuming that DFR[B2_SEL] = 1 and  
ECR0[LB2] = 0.  
6
U_FORCE_B1DN Microcontroller Access to Downstream B1 Channel. When this bit is set, the  
microcontroller can access the downstream B1-channel data from the U-interface to  
the GCI via the register B1DN (0x53) assuming that DFR[B1_SEL] = 1 and  
ECR0[LB1] = 0.  
5
Reserved. Program to 0.  
4—0  
OFF2[4:0]  
OFFSET of PFS2. Determines the number of time slots by which PFS2 (B2-channel)  
is offset from the first time slot of the frame.  
80  
Lucent Technologies Inc.  
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