T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
7 Transmission Superblock (continued)
7.6 DFAC Register Set (continued)
Table 39. SIR: S-Interface Interrupt Register (0x16)
Reg
R/W
Bit 7
—
Bit 6
—
Bit 5
—
Bit 4
—
Bit 3
SSC
0
Bit 2
FSERRL
0
Bit 1
QSC
0
Bit 0
SSRDY
0
SIR
R
RESET Default
—
—
—
—
Note: All defined bits in this register are set to 1 upon occurrence of the corresponding interrupt condition, and are
cleared to 0 when the register is read.
Bit # Symbol
Name/Description
7—4
3
—
Reserved.
S-Interface Activation State Change. This interrupt occurs whenever any one of the
RXINFO3, RXINFO1, and ASI[2:0] bits in register SSR changes state.
SSC
S-Interface Receiver Frame Synchronization Error, Latched. This interrupt occurs on the
rising edge of the FSERR signal from the S block (see bit SSR[FSERR]), and is reset when
read. Note that this interrupt will occur only when FSERR transitions from 0 to 1. If the FSERR
condition persists after reading this bit, it will not cause this bit to be set again until FSERR
goes away, and then transitions to 1 again. To poll the current state of FSERR, bit
SSR[FSERR] can be used.
2
FSERRL
S-Interface Q Bit Change. This interrupt occurs to signal that a complete Q-channel nibble
has been received and is available in register MFR0.
1
0
QSC
S-Interface Ready to Accept New S-Channel Nibble. This interrupt occurs to signal that the
current S-subchannel nibbles have been transmitted and a new set may be written to register
MFR1.
SSRDY
Table 40. SIE: S-Interface Interrupt Enable Register (0x17)
This register contains enable bits for the interrupts in register SIR.
Reg
R/W
Bit 7
—
Bit 6
—
Bit 5
—
Bit 4
—
Bit 3
SSCE
0
Bit 2
FSERRLE
0
Bit 1
QSCE
0
Bit 0
SSRDYE
0
SIE
R/W
RESET Default
0
0
0
0
Bit #
Symbol
Name/Description
7—4
—
Reserved. Program to 0.
3
2
1
0
SSCE
SSC Interrupt Enable.
0: Interrupt disabled.
1: Interrupt enabled.
FSERRLE FSERRL Interrupt Enable.
0: Interrupt disabled.
1: Interrupt enabled.
QSCE
QSC Interrupt Enable.
0: Interrupt disabled.
1: Interrupt enabled.
SSRDYE SSRDY Interrupt Enable.
0: Interrupt disabled.
1: Interrupt enabled.
46
Lucent Technologies Inc.
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