Ambassador T8100A, T8102, and T8105
H.100/H.110 Interfaces and Time-Slot Interchangers
Advance Data Sheet
November 1999
Appendix A. Application of Clock Modes (continued)
TODJAT/GP6 FROMDJAT/GP7
NETREF
INT/EXT
SELECT
GP6
GP7
EN_NETREF2
CT_NETREF2
NETREF
NET-
REF
SEL.
DIVIDE-BY-N
EN_NETREF1
CT_NETREF1
EN_A
DJAT BYPASS
(AND GP6/7 ENABLE)
DIVIDE REGISTER
C8
CT_C8_A
÷ BY 8
FRAME
/CT_FRAME_A
EN_B
C8
NETREF
SELECT
CT_C8_B
FRAME
BIT SLIDER
CONTROLS
BIT SLIDER
/CT_FRAME_B
COMPATIBILITY
CLOCKS DIRECTION
/CT_FRAME_A
/CT_FRAME_B
/FR_COMP
FRAME
SEL.
16.384 MHz
FRAME SYNC
STATE
MACHINES
/CT16 ±
4 MHz
2.048 MHz
C2
2 MHz
DPLL
4.096 MHz
/C4
PLL #1
BYPASS
CLOCK
SEL.
2.048 MHz
RESOURCE
DIVIDE-BY-N
4.096 MHz
SCLK
2.048 MHz
L_REF0
PLL #1
8.192 MHz
DIVIDE REGISTER
65.536 MHz
SCSEL
4.096 MHz
x16
x32
SCLKX2
CLOCK
RESOURCE
SELECT
8.192 MHz
RATE SELECT
L_REF7
CLOCK
SEL.
MAIN
DIVIDE-BY-N
CT_NETREF
CT_C8
CLKB
FRAME
AND
/FR_COMP
DIVIDE REGISTER
INPUT
STATE
MACH.
SEC8K
FRAME
/C16±
PLL #2 BYPASS
/C4
C2
2.048 MHz
SCLK
DIVIDE-
BY-2
SCLKX2
PLL #2
4.096 MHz
L_SC0
8.192 MHz
x8
(FALLBACK PATH)
DIVIDE-
BY-4
x16
16.384 MHz
RATE SELECT
PLL#2 ÷ 2
XTALIN
L_SC CTL
(1 OF 4
TCLKOUT
SELECT
L_SC[1:3]
PRIREFOUT
4MHzIN
3MHzIN
NOT SHOWN)
TCLKOUT
ENABLE
TCLKOUT
FRAMERS
2 MHz DJAT
5-6129bF
Figure 35. E1, CT Bus Master, Compatibility Clock Master, Clock Source = 2.048 MHz from Trunk
98
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
