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LU6612 参数 Datasheet PDF下载

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型号: LU6612
PDF下载: 下载PDF文件 查看货源
内容描述: LU6612 FASTCAT单TM -FET用于10BASE-T / 100BASE-TX [LU6612 FASTCAT TM Single-FET for 10Base-T/100Base-TX]
分类和应用:
文件页数/大小: 36 页 / 495 K
品牌: AGERE [ AGERE SYSTEMS ]
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LU6612  
Data Sheet  
July 2000  
FASTCAT Single-FET for 10Base-T/100Base-TX  
MII Station Management (continued)  
Table 13. MR5—Autonegotiation Link Partner (LP) Ability Register Bit Descriptions (Base_Page)  
Bit1  
Type2  
Description  
5.15 (LP_NEXT_PAGE)  
R
Link Partner Next Page. When this bit is set to 1, it indicates that the link  
partner wishes to engage in next page exchange.  
5.14 (LP_ACK)  
R
R
Link Partner Acknowledge. When this bit is set to 1, it indicates that the link  
partner has successfully received at least three consecutive and consistent  
FLP bursts.  
Link Partner Remote Fault. When this bit is set to 1, it indicates that the link  
partner has a fault.  
5.13 (LP_REM_FAULT)  
5.12:10  
5.9 (LP_100BASET4)  
R
R
Reserved. These bits are reserved.  
Link Partner 100Base-T4. When this bit is set to 1, it indicates that link part-  
ner is capable of 100Base-T4 operation.  
5.8 (LP_100BASET_FD)  
5.7 (LP_100BASETX)  
5.6 (LP_10BASET_FD)  
5.5 (LP_10BASET)  
R
R
R
R
R
Link Partner 100Base-TX Full Duplex. When this bit is set to 1, it indicates  
that link partner is capable of 100Base-TX full-duplex operation.  
Link Partner 100Base-TX. When this bit is set to 1, it indicates that link part-  
ner is capable of 100Base-TX operation.  
Link Partner 10Base-T Full Duplex. When this bit is set to 1, it indicates that  
link partner is capable of 10Base-T full-duplex operation.  
Link Partner 10Base-T. When this bit is set to 1, it indicates that link partner  
is capable of 10Base-T operation.  
5.4:0 (LP_SELECT)  
Selector Field. This field contains the type of message sent by the link part-  
ner. For IEEE 802.3 compliant link partners, this field should read 00001.  
1. Note that the format for the pin descriptions is as follows: the first number is the register number, the second number is the bit position in the  
register, and the name of the instantiated pad is in capital letters.  
2. R = read.  
Table 14. MR5—Autonegotiation Link Partner (LP) Ability Register Bit Descriptions (Next_Page)  
Bit1  
Type2  
Description  
5.15 (LP_NEXT_PAGE)  
R
Next Page. When this bit is set to a logic 0, it indicates that this is the last  
page to be transmitted. A logic 1 indicates that additional pages will follow.  
5.14 (LP_ACK)  
5.13 (LP_MES_PAGE)  
5.12 (LP_ACK2)  
R
R
R
Acknowledge. When this bit is set to a logic 1, it indicates that the link part-  
ner has successfully received its partner’s link code word.  
Message Page. This bit is used by the Next_Page function to differentiate a  
Message Page (logic one) from an unformatted page (logic zero).  
Acknowledge 2. This bit is used by Next_Page function to indicate that a  
device has the ability to comply with the message (logic one) or not (logic  
zero).  
5.11 (LP_TOGGLE)  
5.10:0 (MCF)  
R
R
Toggle. This bit is used by the arbitration function to ensure synchronization  
with the link partner during next page exchange. Logic 0 indicates that the  
previous value of the transmitted link code word was logic 1. Logic 1 indicates  
that the previous value of the transmitted link code word was logic 0.  
Message/Unformatted Code Field. With these 11 bits, there are 2048 possi-  
ble messages. Message code field definitions are described in annex 28C of  
the IEEE 802.3u standard.  
1. Note that the format for the pin descriptions is as follows: the first number is the register number, the second number is the bit position in the  
register, and the name of the instantiated pad is in capital letters.  
2. R = read.  
18  
Lucent Technologies Inc.  
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