ADXL362
Data Sheet
CS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
SCLK
INSTRUCTION
8-BIT ADDRESS
MOSI
MISO
0
0
0
0
0
DATA OUT
7
6
5
4
3
2
1
0
Figure 36. Register Read
CS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
SCLK
INSTRUCTION
8-BIT ADDRESS
DATA BYTE
MOSI
MISO
0
0
0
0
1
0
1
0
7
6
5
4
3
2
1
0
HIGH IMPEDANCE
Figure 37. Register Write
CS
SCLK
MOSI
MISO
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
8-BIT ADDRESS
INSTRUCTION
0 0 1
0
0
1
1
7
6
5
4
3
2
1
0
OUT BYTE 1
OUT BYTE n
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Figure 38. Burst Read
CS
SCLK
MOSI
MISO
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
8-BIT ADDRESS
DATA BYTE 1
DATA BYTE n
2
INSTRUCTION
0
0
0
1
0
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
1
0
HIGH IMPEDANCE
Figure 39. Burst Write
CS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
SCLK
INSTRUCTION
MOSI
MISO
0
0
0
0
1
1
0
1
OUT BYTE 1
OUT BYTE n
7
6
5
4
3
2
1
0
Figure 40. FIFO Read
Rev. B | Page 20 of 44