ADXL36±
Data Sheet
ADDITIONAL FEATURES
FREE FALL DETECTION
SYNCHRONIZED DATA SAMPLING
Many digital output accelerometers include a built-in free fall
detection feature. In the ADXL362, this function can be imple-
mented using the inactivity interrupt. Refer to the Applications
Information section for more details, including suggested
threshold and timing values.
For applications that require a precisely timed acceleration
measurement, the ADXL362 features an option to synchronize
acceleration sampling to an external trigger.
SELF TEST
The ADXL362 incorporates a self test feature that effectively
tests its mechanical and electronic systems simultaneously.
When the self test function is invoked, an electrostatic force is
applied to the mechanical sensor. This electrostatic force moves the
mechanical sensing element in the same manner as acceleration,
and it is additive to the acceleration experienced by the device.
This added electrostatic force results in an output change on all
three axes.
EXTERNAL CLOCK
The ADXL362 has a built-in 51.2 kHz (typical) clock that, by
default, serves as the time base for internal operations.
ODR and bandwidth scale proportionally with the clock. The
ADXL362 provides a discrete number of options for ODR, such
as 100 Hz, 50 Hz, 25 Hz, and so forth, in factors of 2, (see the
Filter Control Register section for a complete listing). To
achieve data rates other than those provided, an external clock
can be used at the appropriate clock frequency. The output data
rate scales with the clock frequency, as shown in Equation 3.
USER REGISTER PROTECTION
The ADXL362 includes user register protection for single event
upsets (SEUs). An SEU is a change of state caused by ions or
electromagnetic radiation striking a sensitive node in a micro-
electronic device. The state change is a result of the free charge
created by ionization in or close to an important node of a logic
element (for example, a memory bit). The SEU, itself, is not con-
sidered permanently damaging to transistor or circuit functionality,
but it can create erroneous register values. The ADXL362 registers
that are protected from SEU are Register 0x20 to Register 0x2E.
f
ODRACTUAL = ODRSELECTED
×
(3)
51.2 kHz
For example, to achieve an 80 Hz ODR, select the 100 Hz ODR
setting and provide a clock frequency that is 80% of nominal, or
41.0 kHz.
The ADXL362 can operate with external clock frequencies
ranging from the nominal 51.2 kHz down to 25.6 kHz to allow
the user to achieve any desired output data rate.
SEU protection is implemented via a 99-bit error correcting
(Hamming-type) code that detects both single- and double-bit
errors. The check bits are recomputed any time a write to any of
the protected registers occurs. At any time, if the stored version
of the check bits is not in agreement with the current check bit
calculation, the ERR_USER_REGS status bit is set.
Alternatively, an external clock can be used to improve clock
frequency accuracy. The distribution of clock frequencies
among a sampling of >1000 parts has a standard deviation of
approximately 3%. To achieve tighter tolerances, a more
accurate clock can be provided externally.
The SEU bit in the status register is set on power-up prior to
device configuration; it clears upon the first register write to
that device.
Bandwidth automatically scales to ½ or ¼ of the ODR (based
on the HALF_BW setting), and this ratio is preserved, regardless
of clock frequency. Power consumption also scales with clock
frequency: higher clock rates increase power consumption.
Figure 34 shows how power consumption varies with clock rate.
3.0
TEMPERATURE SENSOR
The ADXL362 includes an integrated temperature sensor that
can monitor internal system temperature or improve the tempera-
ture stability of the device via calibration. For example, acceleration
outputs vary with temperature at a rate of 0.5 mg/°C (typical),
but the relationship to temperature is repeatable and can be
calibrated.
2.5
2.0
1.5
1.0
0.5
To use the temperature sensor to monitor absolute temperature,
it is recommended that its initial bias (its output at some known
temperature) is measured and calibrated.
V
V
V
= 1.6V
= 2.0V
= 3.5V
S
S
S
0
43
44
45
46
47
48
49
50
51
52
EXTERNAL CLOCK FREQUENCY (kHz)
Figure 34. Current Consumption vs. External Clock Rate
Rev. PrA Page 4 of 8
ADI [ ADI ]
