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ADV7180KST48Z-RL 参数 Datasheet PDF下载

ADV7180KST48Z-RL图片预览
型号: ADV7180KST48Z-RL
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 4A ?过采样SDTV视频解码器 [10-Bit, 4× Oversampling SDTV Video Decoder]
分类和应用: 解码器电视
文件页数/大小: 120 页 / 2118 K
品牌: ADI [ ADI ]
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Data Sheet  
ADV7180  
For all NTSC/PAL VSYNC timing controls, both the V bit in  
the AV code and the VSYNC signal on the VS pin are modified.  
1
NVBEGSIGN  
0
ADVANCE BEGIN OF  
VSYNC BY NVBEG[4:0]  
DELAY BEGIN OF  
VSYNC BY NVBEG[4:0]  
1
NVENDSIGN  
0
ADVANCE END OF  
VSYNC BY NVEND[4:0]  
DELAY END OF VSYNC  
BY NVEND[4:0]  
NOT VALID FOR USER  
PROGRAMMING  
ODD FIELD?  
YES  
NO  
NOT VALID FOR USER  
PROGRAMMING  
ODD FIELD?  
YES  
NO  
NVBEGDELO  
1
NVBEGDELE  
1
0
0
NVENDDELO  
1
NVENDDELE  
1
ADDITIONAL  
DELAY BY  
1 LINE  
ADDITIONAL  
DELAY BY  
1 LINE  
0
0
ADDITIONAL  
DELAY BY  
1 LINE  
ADDITIONAL  
DELAY BY  
1 LINE  
VSBHO  
1
VSBHE  
1
0
0
VSEHO  
1
VSEHE  
1
ADVANCE BY  
0.5 LINE  
ADVANCE BY  
0.5 LINE  
0
0
ADVANCE BY  
0.5 LINE  
ADVANCE BY  
0.5 LINE  
VSYNC BEGIN  
Figure 38. NTSC VSYNC Begin  
VSYNC END  
NVBEGDELO, NTSC VSYNC Begin Delay on Odd Field,  
Address 0xE5[7]  
Figure 39. NTSC VSYNC End  
NVENDDELO, NTSC VSYNC End Delay on Odd Field,  
Address 0xE6[7]  
When NVBEGDELO is 0 (default), there is no delay.  
Setting NVBEGDELO to 1 delays VSYNC going high on an odd  
field by a line relative to NVBEG.  
When NVENDDELO is 0 (default), there is no delay.  
Setting NVENDDELO to 1 delays VSYNC from going low on  
an odd field by a line relative to NVEND.  
NVBEGDELE, NTSC VSYNC Begin Delay on Even Field,  
Address 0xE5[6]  
NVENDDELE, NTSC VSYNC End Delay on Even Field,  
Address 0xE6[6]  
When NVBEGDELE is 0 (default), there is no delay.  
Setting NVBEGDELE to 1 delays VSYNC going high on an  
even field by a line relative to NVBEG.  
When NVENDDELE is set to 0 (default), there is no delay.  
Setting NVENDDELE to 1 delays VSYNC from going low on an  
even field by a line relative to NVEND.  
NVBEGSIGN, NTSC VSYNC Begin Sign, Address 0xE5[5]  
Setting NVBEGSIGN to 0 delays the start of VSYNC. Set for  
user manual programming.  
NVENDSIGN, NTSC VSYNC End Sign, Address 0xE6[5]  
Setting NVBEGSIGN to 1 (default) advances the start of  
VSYNC (not recommended for user programming).  
Setting NVENDSIGN to 0 (default) delays the end of VSYNC.  
Set for user manual programming.  
Setting NVENDSIGN to 1 advances the end of VSYNC (not  
recommended for user programming).  
NVBEG[4:0], NTSC VSYNC Begin, Address 0xE5[4:0]  
The default value of NVBEG is 00101, indicating the NTSC  
VSYNC begin position.  
Rev. G | Page 49 of 120  
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