Data Sheet
ADV7180
Table 68. NTSC
Feature
SYNC PROCESSING
Standard
The ADV7180 has two additional sync processing blocks that
postprocess the raw synchronization information extracted
from the digitized input video. If desired, the blocks can be
disabled via the following two I2C bits: ENHSPLL and
ENVSPROC.
Teletext System B and D
Teletext System C/NABTS
Vertical Interval Time Codes (VITC)
Copy Generation Management
System (CGMS)
ITU-R BT.653
ITU-R BT.653/EIA-516
Not applicable
EIA-J CPR-1204/IEC 61880
ENHSPLL, Enable HSYNC Processor, Address 0x01[6]
Gemstar
Not applicable
EIA-608
Closed Captioning (CCAP)
The HSYNC processor is designed to filter incoming HSYNCs that
have been corrupted by noise, providing improved performance
for video signals with stable time bases but poor SNR.
The VBI data standard that the VDP decodes on a particular
line of incoming video has been set by default as described in
Table 69. This can be overridden manually and any VBI data can
be decoded on any line. The details of manual programming are
described in Table 70.
Setting ENHSPLL to 0 disables the HSYNC processor.
Setting ENHSPLL to 1 (default) enables the HSYNC processor.
ENVSPROC, Enable VSYNC Processor, Address 0x01[3]
VDP Default Configuration
This block provides extra filtering of the detected VSYNCs to
improve vertical lock.
The VDP can decode different VBI data standards on a line-to-
line basis. The various standards supported by default on different
lines of VBI are explained in Table 69.
Setting ENVSPROC to 0 disables the VSYNC processor.
Setting ENVSPROC to 1 (default) enables the VSYNC processor.
VBI DATA DECODE
VDP Manual Configuration
MAN_LINE_PGM, Enable Manual Line Programming of
VBI Standards, Address 0x64[7], User Sub Map
The following are the two VBI data slicers on the ADV7180: the
VBI data processor (VDP) and the VBI System 2.
The user can configure the VDP to decode different standards on
a line-to-line basis through manual line programming. For this,
the user must set the MAN_LINE_PGM bit. The user must write
into all the line programming registers, VBI_DATA_Px_Ny and
VBI_DATA_Px (see Register 0x64 to Register 0x77 in Table 108).
The VDP can slice both low bandwidth standards and high
bandwidth standards such as teletext. VBI System 2 can slice
low data rate VBI standards only.
The VDP is capable of slicing multiple VBI data standards on
SD video. It decodes the VBI data on the incoming CVBS and
Y/C or YUV data. The decoded results are available as ancillary
data in output 656 data stream. For low data rate VBI standards
like CC/WSS/CGMS, users can read the decoded data bytes
from the I2C registers.
When MAN_LINE_PGM to 0 (default) is set, the VDP decodes
default standards on lines, as shown in Table 69.
When MAN_LINE_PGM to 1 is set, the VBI standards to be
decoded are manually programmed.
VBI_DATA_Px_Ny[3:0], VBI_DATA_Px[3:0], VBI
Standard to be Decoded on Line X for PAL, Line Y for
NTSC, Address 0x64 to Address 0x77, User Sub Map
The VBI data standards that can be decoded by the VDP are
listed in Table 67 and Table 68.
These are related 4-bit clusters in Register 0x64 to Register 0x77
of the user sub map. These 4-bit, line programming registers,
VBI_DATA_Px_Ny and VBI_DATA_Px, identify the VBI data
standard that are decoded on Line X in PAL mode or on Line Y
in NTSC mode. The different types of VBI standards decoded
by VBI_DATA_Px_Ny and VBI_DATA_Px are shown in
Table 70. Note that the X or Y value depends on whether the
ADV7180 is in PAL or NTSC mode.
Table 67. PAL
Feature
Standard
Teletext System A, C, or D
Teletext System B/WST
Video Programming System (VPS)
Vertical Interval Time Codes (VITC)
Wide Screen Signaling (WSS)
ITU-R BT.653
ITU-R BT.653
ETSI EN 300 231 V 1.3.1
Not applicable
ITU-R BT.1119-1/
ETSI EN.300294
Closed Captioning (CCAP)
Not applicable
Rev. G | Page 53 of 120
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