Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
ADuC7024/ADuC7025
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
1
2
3
4
5
6
7
8
9
48 P1.2/SPM2/PLAI[2]
47 P1.3/SPM3/PLAI[3]
46 P1.4/SPM4/PLAI[4]/IRQ2
45 P1.5/SPM5/PLAI[5]/IRQ3
44 P4.1/PLAO[9]
PIN 1
INDICATOR
ADuC7024/
43 P4.0/PLAO[8]
GND
42 IOV
REF
DD
ADuC7025
ADCNEG
DAC0/ADC12
DAC1/ADC13 10
TMS 11
TDI 12
P4.6/PLAO[14] 13
P4.7/PLAO[15] 14
41 IOGND
40 P1.6/SPM6/PLAI[6]
39 P1.7/SPM7/PLAO[0]
TOP VIEW
(Not to Scale)
38 P3.7/PWM
37 P3.6/PWM
36 XCLKI
/PLAI[15]
/PLAI[14]
SYNC
TRIP
35 XCLKO
BM/P0.0/CMP /PLAI[7] 15
OUT
34 P0.7/ECLK/XCLK/SPM8/PLAO[4]
P0.6/T1/MRST/PLAO[3] 16
33 P2.0/SPM9/PLAO[5]/CONV
START
NOTES
1. THE EXPOSED PAD MUST BE SOLDERED FOR MECHANICAL PURPOSES AND LEFT UNCONNECTED.
Figure 23. 64-Lead LFCSP_VQ Pin Configuration (ADuC7024/ADuC7025)
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
1
2
3
4
5
6
7
8
9
48 P1.2/SPM2/PLAI[2]
47 P1.3/SPM3/PLAI[3]
46 P1.4/SPM4/PLAI[4]/IRQ2
45 P1.5/SPM5/PLAI[5]/IRQ3
44 P4.1/PLAO[9]
PIN 1
INDICATOR
ADuC7024/
43 P4.0/PLAO[8]
GND
42 IOV
REF
DD
ADuC7025
ADCNEG
DAC0/ADC12
DAC1/ADC13 10
TMS 11
TDI 12
P4.6/PLAO[14] 13
P4.7/PLAO[15] 14
41 IOGND
40 P1.6/SPM6/PLAI[6]
39 P1.7/SPM7/PLAO[0]
TOP VIEW
(Not to Scale)
38 P3.7/PWM
37 P3.6/PWM
36 XCLKI
/PLAI[15]
/PLAI[14]
SYNC
TRIP
35 XCLKO
BM/P0.0/CMP
/PLAI[7] 15
P0.6/T1/MRST/PLAO[3] 16
34 P0.7/ECLK/XCLK/SPM8/PLAO[4]
OUT
33 P2.0/SPM9/PLAO[5]/CONV
START
Figure 24. 64-Lead LQFP Pin Configuration (ADuC7024/ADuC7025)
Rev. F | Page 25 of 104
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