ADSP-BF531/ADSP-BF532/ADSP-BF533
ELECTRICAL CHARACTERISTICS
Low Power
1
Parameter
V
OH
V
OH
V
OH
V
OL
V
OL
I
IH
I
IHP
I
IL
6
I
OZH
I
OZL
C
IN
I
DDHIBERNATE
I
DDRTC
I
DDDEEPSLEEP
10
I
DDSLEEP
I
DD
_
TYP
I
DD
_
TYP
I
DD
_
TYP
I
DD
_
TYP
I
DD
_
TYP
1
2
High Speed
2
1.5
1.9
2.4
0.2
0.4
10.0
50.0
10.0
10.0
10.0
0.2
0.4
V
V
V
V
V
Test Conditions
High Level Output Voltage
3
High Level Output Voltage
High Level Output Voltage
Low Level Output Voltage
Low Level Output Voltage
High Level Input Current
4
High Level Input Current JTAG
5
Low Level Input Current
Three-State Leakage Current
7
Three-State Leakage Current
Input Capacitance
8
V
DDINT
Current in Hibernate State
V
DDRTC
Current
V
DDINT
Current in Sleep Mode
@ V
DDEXT
= 1.75 V, I
OH
= –0.5 mA
@ V
DDEXT
= 2.25 V, I
OH
= –0.5 mA
@ V
DDEXT
= 3.0 V, I
OH
= –0.5 mA
@ V
DDEXT
= 1.75 V, I
OL
= 2.0 mA
@ V
DDEXT
= 2.25 V/3.0 V, I
OL
= 2.0 mA
@ V
DDEXT
= Maximum, V
IN
= V
DD
Maximum
@ V
DDEXT
= Maximum, V
IN
= V
DD
Maximum
@ V
DDEXT
= Maximum, V
IN
= 0 V
@ V
DDEXT
= Maximum, V
IN
= V
DD
Maximum
@ V
DDEXT
= Maximum, V
IN
= 0 V
f
IN
= 1 MHz, T
AMBIENT
= 25°C, V
IN
= 2.5 V
V
DDEXT
= 3.65 V
with voltage regulator off (V
DDINT
= 0 V)
V
DDRTC
= 3.3 V, T
JUNCTION
= 25°C
V
DDINT
= 0.8 V, T
JUNCTION
= 25°C, SCLK = 25 MHz
Min Typical Max Min Typical Max Unit
1.5
1.9
2.4
10.0 μA
50.0 μA
10.0 μA
10.0 μA
10.0 μA
4
50
20
35
37.5
47
198
240
250
308
pF
μA
μA
mA
mA
mA
mA
mA
mA
mA
4
50
20
7.5
10
20
132
8
9
V
DDINT
Current in Deep Sleep Mode V
DDINT
= 0.8 V, T
JUNCTION
= 25°C
V
DDINT
Current Dissipation (Typical) V
DDINT
= 0.8 V, f
CCLK
= 50 MHz, T
JUNCTION
= 25°C
V
DDINT
Current Dissipation (Typical) V
DDINT
= 1.14 V, f
CCLK
= 400 MHz, T
JUNCTION
= 25°C
V
DDINT
Current Dissipation (Typical) V
DDINT
= 1.2 V, f
CCLK
= 500 MHz, T
JUNCTION
= 25°C
V
DDINT
Current Dissipation (Typical) V
DDINT
= 1.2 V, f
CCLK
= 533 MHz, T
JUNCTION
= 25°C
V
DDINT
Current Dissipation (Typical) V
DDINT
= 1.3 V, f
CCLK
= 600 MHz, T
JUNCTION
= 25°C
Applies to all 400 MHz speed grade models. See
Applies to all 500 MHz, 533 MHz, and 600 MHz speed grade models. See
3
Applies to output and bidirectional pins.
4
Applies to input pins except JTAG inputs.
5
Applies to JTAG input pins (TCK, TDI, TMS, TRST).
6
Absolute value.
7
Applies to three-statable pins.
8
Applies to all signal pins.
9
Guaranteed, but not tested.
10
See
Estimating Power for ADSP-BF531/BF532/BF533 Blackfin Processors (EE-229)
on the Analog Devices website (www.analog.com)—use site search on “EE-229.”
11
Processor executing 75% dual MAC, 25% ADD with moderate data bus activity.
Rev. E |
Page 22 of 60 |
July 2007
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