ADSP-BF531/ADSP-BF532/ADSP-BF533
SPECIFICATIONS
Component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
V
DDINT
Internal Supply Voltage
1
V
DDINT
Internal Supply Voltage
V
DDINT
Internal Supply Voltage
V
DDINT
Internal Supply Voltage
V
DDEXT
External Supply Voltage
V
DDEXT
External Supply Voltage
V
DDRTC
Real-Time Clock
Power Supply Voltage
V
DDRTC
Real-Time Clock
Power Supply Voltage
V
IH
V
IH
V
IL
V
IL
T
J
T
J
T
J
T
J
T
J
T
J
1
2
Conditions
Nonautomotive 400 MHz and 500 MHz speed grade models
2
Nonautomotive 533 MHz speed grade models
600 MHz speed grade models
Automotive grade models
Nonautomotive grade models
2
Automotive grade models
Nonautomotive grade models
2
Automotive grade models
V
DDEXT
=1.85 V
V
DDEXT
=Maximum
V
DDEXT
=Maximum
V
DDEXT
=1.75 V
V
DDEXT
=2.25 V
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T
AMBIENT
= 0°C to +70°C
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T
AMBIENT
= –40°C to +85°C
169-Ball Plastic Ball Grid Array (PBGA) @ T
AMBIENT
= –40°C to +105°C
169-Ball Plastic Ball Grid Array (PBGA) @ T
AMBIENT
= –40°C to +85°C
176-Lead Quad Flatpack (LQFP) @ T
AMBIENT
= –40°C to +85°C
Min Nominal
0.8 1.2
0.8 1.25
0.8 1.30
0.95 1.2
2.7 3.3
Max Unit
1.32
1.45
1.32
3.6
V
V
V
V
V
V
V
V
V
V
1.375 V
1.75 1.8/2.5/3.3 3.6
1.75 1.8/2.5/3.3 3.6
2.7 3.3
1.3
2.0
2.2
–0.3
–0.3
0
–40
–40
–40
–40
3.6
3.6
3.6
3.6
High Level Input Voltage
3, 4
High Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
Junction Temperature
Junction Temperature
Junction Temperature
Junction Temperature
Junction Temperature
Junction Temperature
V
IHCLKIN
High Level Input Voltage
5
+0.3 V
+0.6 V
+95
°C
+105 °C
+125 °C
+125 °C
+105 °C
+100 °C
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T
AMBIENT
= –40°C to +105°C –40
The regulator can generate V
DDINT
at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with–4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance.
See
3
Applies to all input and bidirectional pins except CLKIN.
4
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are 3.3 V tolerant (always accepts up to 3.6 V maximum V
IH
), but voltage compliance (on outputs, V
OH
) depends on
the input V
DDEXT
, because V
OH
(maximum) approximately equals V
DDEXT
(maximum). This 3.3 V tolerance applies to bidirectional pins (DATA15–0, TMR2–0, PF15–0, PPI3–0,
RSCLK1–0, TSCLK1–0, RFS1–0, TFS1–0, MOSI, MISO, SCK) and input only pins (BR, ARDY, PPI_CLK, DR0PRI, DR0SEC, DR1PRI, DR1SEC, RX, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE1–0).
5
Applies to CLKIN pin only.
6
Applies to all input and bidirectional pins.
Rev. E |
Page 21 of 60 |
July 2007
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