Data Sheet
ADM3055E/ADM3057E
TIMING SPECIFICATIONS
All voltages are relative to their respective ground. 4.5 V ≤ VCC ≤ 5.5 V, 1.7 V ≤ VIO ≤ 5.5 V, TMIN to TMAX, and STBY low, unless otherwise
noted. Typical specifications are at VCC = VIO = 5 V and TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Min
Typ Max Unit
Test Conditions/Comments
DRIVER
SILENT low, bit time on the TXD pin as transmitted
by the CAN controller (tBIT_TXD) = 200 ns, see Figure 2
and Figure 30, slope resistance (RSLOPE) = 0 Ω, RL =
60 Ω, load capacitance (CL) = 100 pF
Maximum Data Rate
12
Mbps
Propagation Delay from TXD to Bus
(Recessive to Dominant)
Propagation Delay from TXD to Bus
(Dominant to Recessive)
Transmit Dominant Timeout
RECEIVER
tTXD_DOM
tTXD_REC
tDT
35
46
60
70
ns
ns
1175
4000 µs
TXD low, see Figure 5
SILENT low, see Figure 2 and Figure 30, RL = 60 Ω, CL =
100 pF, RXD capacitance (CRXD) = 15 pF
Falling Edge Loop Propagation Delay tLOOP_FALL
(TXD to RXD)
Full Speed Mode
Slope Control Mode
150
300
ns
ns
RSLOPE = 0 Ω, tBIT_TXD = 200 ns
RSLOPE = 47 kΩ, tBIT_TXD = 1 µs
Rising Edge Loop Propagation Delay
(TXD to RXD)
tLOOP_RISE
Full Speed Mode
Slope Control Mode
150
300
ns
ns
RSLOPE = 0 Ω, tBIT_TXD = 200 ns
RSLOPE = 47 kΩ, tBIT_TXD = 1 µs
Loop Delay Symmetry (Minimum
Recessive Bit Width)
tBIT_RXD
2 Mbps
5 Mbps
8 Mbps
450
160
85
550
220
140
91.6
ns
ns
ns
ns
tBIT_TXD = 500 ns
tBIT_TXD = 200 ns
tBIT_TXD = 125 ns
tBIT_TXD = 83.3 ns
12 Mbps
50
CANH, CANL SLEW RATE
|SR|
7
V/µs
SILENT low, see Figure 30, RL = 60 Ω, CL = 100 pF,
RSLOPE = 47 kΩ
STANDBY MODE
Minimum Pulse Width Detected
(Receiver Filter Time)
Wake-Up Pattern Detection Reset Time tWUPR
Normal Mode to Standby Mode Time tSTBY_ON
Standby Mode to Normal Mode Time tSTBY_OFF
AUXILIARY SIGNAL
tFILTER
1
5
µs
STBY high, see Figure 4
STBY high, see Figure 4
1175
4000 µs
25
25
µs
µs
Time until RXD valid
Maximum Switching Rate
AUXIN to AUXOUT Propagation Delay
SILENT MODE
fAUX
tAUX
20
kHz
µs
25
Normal Mode to Silent Mode Time
Silent Mode to Normal Mode Time
tSILENT_ON
tSILENT_OFF
40
50
100
100
ns
ns
TXD low, RSLOPE = 0 Ω, see Figure 3
TXD low, RSLOPE = 0 Ω, see Figure 3
Rev. A | Page 5 of 24
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