ADG1419
TEST CIRCUITS
V
I
(ON)
A
D
S
D
S
D
NC
I
DS
V
S
V
D
NC = NO CONNECT
Figure 22. On Resistance
Figure 24. On Leakage
I
(OFF)
A
I (OFF)
D
S
S
D
A
V
V
S
D
Figure 23. Off Leakage
V
V
DD
SS
0.1µF
0.1µF
V
V
IN
IN
50%
50%
50%
V
V
SS
DD
SB
V
S
50%
90%
D
V
OUT
SA
R
300ꢀ
C
35pF
L
L
90%
IN
V
OUT
V
IN
GND
tON
tOFF
Figure 25. Switching Times, tON and tOFF
V
V
V
DD
SS
0.1µF
0.1µF
V
IN
V
DD
SS
SB
SA
V
S
D
V
OUT
80%
V
R
C
OUT
L
L
35pF
300ꢀ
IN
tBBM
tBBM
V
IN
GND
Figure 26. Break-Before-Make Time Delay
V
V
V
V
DD
DD
SS
SS
3V
INx
ENABLE
DRIVE (V
50%
50%
)
SA
SB
V
IN
S
0V
ADG1419
tON (EN)
tOFF (EN)
OUTPUT
0.9V
0.9V
O
D
EN
O
OUTPUT
V
35pF
IN
50ꢀ
300ꢀ
GND
Figure 27. Enable Delay, tON (EN), tOFF (EN)
Rev. 0 | Page 12 of 16
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