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AD9865BCPZ1 参数 Datasheet PDF下载

AD9865BCPZ1图片预览
型号: AD9865BCPZ1
PDF下载: 下载PDF文件 查看货源
内容描述: 宽带调制解调器混合信号前端 [Broadband Modem Mixed-Signal Front End]
分类和应用: 调制解调器
文件页数/大小: 48 页 / 2209 K
品牌: ADI [ ADI ]
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AD9865  
Parameter  
Temp  
Test Level  
Min  
Typ  
Max  
Unit  
Rx PATH LATENCY1  
Full-Duplex Interface  
Half-Duplex Interface  
Full  
Full  
V
V
10.5  
10.0  
Cycles  
Cycles  
Rx PATH COMPOSITE AC PERFORMANCE @ fADC = 50 MSPS2  
RxPGA Gain = 48 dB (Full-Scale = 8.0 mV p-p)  
Signal-to-Noise and Distortion (SNR)  
Total Harmonic Distortion (THD)  
RxPGA Gain = 24 dB (Full-Scale =126 mV p-p)  
Signal-to-Noise (SNR)  
Total Harmonic Distortion (THD)  
RxPGA Gain = 0 dB (Full-Scale = 2.0 V p-p)  
Signal-to-Noise and Distortion (SINAD)  
Total Harmonic Distortion (THD)  
Rx PATH COMPOSITE AC PERFORMANCE @ fADC = 80 MSPS3  
RxPGA Gain = 48 dB (Full-Scale = 8.0 mV p-p)  
Signal-to-Noise (SNR)  
Total Harmonic Distortion (THD)  
RxPGA Gain = 24 dB (Full-Scale = 126 mV p-p)  
Signal-to-Noise (SNR)  
Total Harmonic Distortion (THD)  
RxPGA Gain = 0 dB (Full-Scale = 2.0 V p-p)  
Signal-to-Noise (SNR)  
25°C  
25°C  
III  
III  
43.7  
−71  
dBc  
dBc  
25°C  
25°C  
III  
III  
59  
−67.2  
dBc  
dBc  
Full  
Full  
IV  
IV  
58  
59  
−66  
dBc  
dBc  
−62.9  
25°C  
25°C  
III  
III  
41.8  
−67  
dBc  
dBc  
25°C  
25°C  
III  
III  
58.6  
−62.9  
dBc  
dBc  
25°C  
25°C  
II  
II  
58.9  
59.6  
−69.7  
dBc  
dBc  
Total Harmonic Distortion (THD)  
−59.8  
Rx-to-Tx PATH FULL-DUPLEX ISOLATION  
(1 V p-p, 10 MHz Sine Wave Tx Output)  
RxPGA Gain = 40 dB  
IOUTP Pins to RX Pins  
IOUTG Pins to RX Pins  
RxPGA Gain = 0 dB  
25°C  
25°C  
III  
III  
83  
37  
dBc  
dBc  
IOUTP Pins to RX Pins  
IOUTG Pins to RX Pins  
25°C  
25°C  
III  
III  
123  
77  
dBc  
dBc  
1 Includes RxPGA, ADC pipeline, and ADIO bus delay relative to fADC  
.
2 fIN = 5 MHz, AIN = −1.0 dBFS , LPF cutoff frequency set to 15.5 MHz with Reg. 0x08 = 0x80.  
3 fIN = 5 MHz, AIN = −1.0 dBFS , LPF cutoff frequency set to 26 MHz with Reg. 0x08 = 0x80.  
POWER SUPPLY SPECIFICATIONS  
AVDD = 3.3 V, DVDD = CLKVDD = DRVDD = 3.3 V% RSET = 2 kΩ, full-duplex operation with fDATA = 80 MSPS,1 unless otherwise noted.  
Table 3.  
Parameter  
Temp  
Test Level  
Min  
Typ  
Max  
Unit  
SUPPLY VOLTAGES  
AVDD  
CLKVDD  
DVDD  
DRVDD  
IS_TOTAL (Total Supply Current)  
POWER CONSUMPTION  
IAVDD + ICLKVDD (Analog Supply Current)  
IDVDD + IDRVDD (Digital Supply Current)  
Full  
Full  
Full  
Full  
Full  
V
V
V
V
II  
3.135  
3.0  
3.0  
3.3  
3.3  
3.3  
3.3  
406  
3.465  
3.6  
3.6  
3.6  
475  
V
V
V
V
3.0  
mA  
IV  
IV  
311  
95  
342  
133  
mA  
mA  
Full  
Rev. A | Page 5 of 48  
 
 
 
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