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AD9364BBCZ 参数 Datasheet PDF下载

AD9364BBCZ图片预览
型号: AD9364BBCZ
PDF下载: 下载PDF文件 查看货源
内容描述: [1 x 1 RF Agile Transceiver]
分类和应用: 电信电信集成电路
文件页数/大小: 32 页 / 522 K
品牌: ADI [ ADI ]
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AD9364  
Data Sheet  
Pin No.  
Type1 Mnemonic  
Description  
C5, C6, D5, D6  
I
CTRL_IN0 to CTRL_IN3  
Control Inputs. Use C5, C6, D5, and D6 for manual Rx gain and Tx attenuation  
control.  
D2  
I
VDDA1P3_RX_RF  
Receiver 1.3 V Supply Input. Connect to D3.  
D4, E4 to E6,  
F4 to F6, G4  
O
CTRL_OUT0, CTRL_OUT1 to  
CTRL_OUT3, CTRL_OUT6 to  
CTRL_OUT4, CTRL_OUT7  
Control Outputs. These pins are multipurpose outputs that have programmable  
functionality.  
D7  
I/O  
I/O  
I/O  
I/O  
I/O  
I
P0_D9/TX_D4_P  
P0_D7/TX_D3_P  
P0_D5/TX_D2_P  
P0_D3/TX_D1_P  
P0_D1/TX_D0_P  
VSSD  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D9, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D4_P) can function as part of the LVDS 6-  
bit Tx differential input bus with internal LVDS termination.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D7, it functions as part of the 12-bit bidirectional parallel CMOS level Data  
Port 0. Alternatively, this pin (TX_D3_P) can function as part of the LVDS 6-bit Tx  
differential input bus with internal LVDS termination.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D5, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D2_P) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D3, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D1_P) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
D8  
D9  
D10  
D11  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D1, it functions as part of the 12-bit bidirectional parallel CMOS level Data  
Port 0. Alternatively, this pin (TX_D0_P) can function as part of the LVDS 6-bit Tx  
differential input bus with internal LVDS termination.  
Digital Ground. Tie these pins directly to the VSSA analog ground on the printed  
circuit board (one ground plane).  
D12, F7, F9,  
F11, G12, H7,  
H10, K12  
E2  
E3  
E7  
I
I
VDDA1P3_RX_LO  
VDDA1P3_TX_LO_BUFFER  
P0_D11/TX_D5_P  
Receive LO 1.3 V Supply Input.  
1.3 V Supply Input.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D11, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D5_P) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
I/O  
E8  
I/O  
I/O  
I/O  
I/O  
I/O  
I
P0_D8/TX_D4_N  
P0_D6/TX_D3_N  
P0_D4/TX_D2_N  
P0_D2/TX_D1_N  
P0_D0/TX_D0_N  
VDDA1P3_RX_VCO_LDO  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D8, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D4_N) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D6, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D3_N) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D4, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D2_N) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D2, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D1_N) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
E9  
E10  
E11  
E12  
F2  
Digital Data Port P0/Transmit Differential Input Bus. This is a dual function pin.  
As P0_D0, it functions as part of the 12-bit, bidirectional, parallel CMOS level  
Data Port 0. Alternatively, this pin (TX_D0_N) can function as part of the LVDS  
6-bit Tx differential input bus with internal LVDS termination.  
Receive VCO LDO 1.3 V Supply Input. Connect F2 to E2.  
Rev. B | Page 12 of 32  
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