AD9200
V*
+FS
–FS
AIN
SHA
10k
10k
A2
10k
–F/S RANGE OBTAINED
FROM VREF PIN OR
EXTERNAL REF
10k
REFBF
A/D
CORE
4.2k
TOTAL
0.1 F
10 F
MIDSCALE
AD9200
AIN
AD9200
SHA
10k
10k
MODE
MODE
(AVDD)
REFTF 0.1 F
AVDD/2
+F/S RANGE OBTAINED
FROM VREF PIN OR
EXTERNAL REF
REFTS
REFBS
REFTF 0.1 F
REFTS
REFBS
10k
INTERNAL
REF
MIDSCALE OFFSET
VOLTAGE IS DERIVED
FROM INTERNAL OR
EXTERNAL REF
A2
A/D
CORE
4.2k
TOTAL
0.1 F
10 F
10k
REFBF
0.1 F
0.1 F
* MAXIMUM MAGNITUDE OF V IS DETERMINED
BY INTERNAL REFERENCE
a. Top/Bottom Mode
b. Center Span Mode
MAXIMUM MAGNITUDE OF V
IS DETERMINED BY INTERNAL
REFERENCE AND TURNS RATIO
V
AIN
SHA
AVDD/2
10k
10k
REFTS
REFBS
10k
INTERNAL 10k
REF
REFBF
A2
A/D
CORE
4.2k
TOTAL
0.1 F
10 F
REFTF 0.1 F
AD9200
MODE
AVDD/2
0.1 F
c. Differential Mode
VREF
(2V)
A1
1V
VREF
(1V)
1V
0.1 F
REFSENSE
1.0 F
A1
10k
0.01 F
REFSENSE
1.0 F
AD9200
AVSS
AD9200
10k
AVSS
d. 1 V Reference
e. 2 V Reference
A1
1V
VREF
(= 1 + R
A
/R
B
)
R
A
REFSENSE
R
B
0.1 F
1.0 F
A1
1V
VREF
REFSENSE
AVDD
AD9200
INTERNAL 10K REF RESISTORS ARE
SWITCHED OPEN BY THE PRESENSE
OF R
A
AND R
B
.
AVSS
AD9200
f. Variable Reference
(Between 1 V and 2 V)
Figure 16.
g. Internal Reference Disable
(Power Reduction)
–10–
REV. E
AD [ ANALOG DEVICES ]
