AD9200
0
–3
–6
–9
–12
–15
–18
–21
–24
–27
1.0E+6
APPLYING THE AD9200
THEORY OF OPERATION
The AD9200 implements a pipelined multistage architecture to
achieve high sample rate with low power. The AD9200 distrib-
utes the conversion over several smaller A/D subblocks, refining
the conversion with progressively higher accuracy as it passes
the results from stage to stage. As a consequence of the distrib-
uted conversion, the AD9200 requires a small fraction of the
1023 comparators used in a traditional flash type A/D. A
sample-and-hold function within each of the stages permits the
first stage to operate on a new input sample while the second,
third and fourth stages operate on the three preceding samples.
100.0E+6
10.0E+6
FREQUENCY – Hz
1.0E+9
SIGNAL AMPLITUDE – dB
OPERATIONAL MODES
Figure 13. Full Power Bandwidth
25
20
15
10
5
I
B
– A
REFBS = 0.5V
REFTS = 2.5V
CLOCK = 20MHz
The AD9200 is designed to allow optimal performance in a
wide variety of imaging, communications and instrumentation
applications, including pin compatibility with the AD876 A/D.
To realize this flexibility, internal switches on the AD9200 are
used to reconfigure the circuit into different modes. These modes
are selected by appropriate pin strapping. There are three parts
of the circuit affected by this modality: the voltage reference, the
reference buffer, and the analog input. The nature of the appli-
cation will determine which mode is appropriate: the descrip-
tions in the following sections, as well as the Table I should
assist in picking the desired mode.
0
–5
–10
–15
–20
–25
0
0.5
1.0
2.0
1.5
INPUT VOLTAGE – V
2.5
3.0
Figure 14. Input Bias Current vs. Input Voltage
Table I. Mode Selection
Modes
TOP/BOTTOM
Input
Connect
AIN
AIN
CENTER SPAN AIN
AIN
Differential
AIN Is Input 1
Input
Span
1V
2V
1V
2V
1V
MODE
Pin
AVDD
AVDD
REFSENSE
Pin
REF
REFTS
REFBS
AGND
AGND
AVDD/2
AVDD/2
AVDD/2
29
Figure
18
19
20
Short REFSENSE, REFTS and VREF Together
AGND
Short REFTS and VREF Together
AVDD/2
AVDD/2
AVDD/2
AVDD/2 Short VREF and REFSENSE Together
AVDD/2 AGND
No Connect
AVDD/2 Short VREF and REFSENSE Together
REFTS and
REFBS Are
Shorted Together
for Input 2
2V
External Ref
AIN
AVDD/2 AGND
AVDD
No Connect
No Connect
AVDD/2
AVDD/2
21, 22
23
30
2 V max AVDD
AGND
Span = REFTS
– REFBS (2 V max)
Short to
VREFTF
Short to
VREFBF
Short to
VREFBF
AD876
AIN
2V
Float or
AVSS
AVDD
No Connect
Short to
VREFTF
–8–
REV. E