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AD9200JRS 参数 Datasheet PDF下载

AD9200JRS图片预览
型号: AD9200JRS
PDF下载: 下载PDF文件 查看货源
内容描述: 完整的10位, 20 MSPS , 80毫瓦的CMOS A / D转换器 [Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter]
分类和应用: 转换器光电二极管
文件页数/大小: 24 页 / 341 K
品牌: ADI [ ADI ]
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AD9200  
The input capacitor should be sized to allow sufficient acquisi-  
tion time of the clamp voltage at AIN within the CLAMP inter-  
val, but also be sized to minimize droop between clamping  
intervals. Specifically, the acquisition time when the switch is  
closed will equal:  
back porch to truncate the SYNC below the AD9200’s mini-  
mum input voltage. With a CIN = 1 µF, and RIN = 20 , the  
acquisition time needed to set the input dc level to one volt  
with 1 mV accuracy is about 140 µs, assuming a full 1 volt VC.  
With a 1 µF input coupling capacitor, the droop across one  
horizontal can be calculated:  
VC  
TACQ = RINCIN ln  
VE  
I
BIAS = 10 µA, and t = 63.5 µs, so dV = 0.635 mV, which is less  
than one LSB.  
where VC is the voltage change required across CIN, and VE is  
the error voltage. VC is calculated by taking the difference be-  
tween the initial input dc level at the start of the clamp interval  
and the clamp voltage supplied at CLAMPIN. VE is a system-  
dependent parameter, and equals the maximum tolerable devia-  
tion from VC. For example, if a 2-volt input level needs to be  
clamped to 1 volt at the AD9200’s input within 10 millivolts,  
then VC equals 2 – 1 or 1 volt, and VE equals 10 mV. Note that  
once the proper clamp level is attained at the input, only a very  
small voltage change will be required to correct for droop.  
After the input capacitor is initially charged, the clamp pulse-  
width only needs to be wide enough to correct small voltage  
errors such as the droop. The fine scale settling characteristics  
of the clamp circuitry are shown in Table II.  
Depending on the required accuracy, a CLAMP pulsewidth of  
1 µs–3 µs should work in most applications. The OFFSET val-  
ues ignore the contribution of offset from the clamp amplifier;  
they simply compare the output code with a “final value” mea-  
sured with a much longer CLAMP pulse duration.  
The voltage droop is calculated with the following equation:  
Table II.  
IBIAS  
CIN  
dV =  
t
( )  
CLAMP  
OFFSET  
10 µs  
5 µs  
4 µs  
3 µs  
2 µs  
1 µs  
<1 LSB  
5 LSBs  
7 LSBs  
11 LSBs  
19 LSBs  
42 LSBs  
where t = time between clamping intervals.  
The bias current of the AD9200 will depend on the sampling  
rate, FS. The switched capacitor input AIN appears resistive  
over time, with an input resistance equal to 1/CSFS. Given a  
sampling rate of 20 MSPS and an input capacitance of 1 pF, the  
input resistance is 50 k. This input resistance is equivalently  
terminated at the midscale voltage of the input range. The worst  
case bias current will thus result when the input signal is at the  
extremes of the input range, that is, the furthest distance from  
the midscale voltage level. For a 1-volt input range, the maxi-  
mum bias current will be ±0.5 volts divided by 50 k, which is  
±10 µA.  
AD9200  
CLAMP IN  
CLAMP  
SW1  
If droop is a critical parameter, then the minimum value of CIN  
should be calculated first based on the droop requirement.  
Acquisition time—the width of the CLAMP pulse—can be  
adjusted accordingly once the minimum capacitor value is cho-  
sen. A tradeoff will often need to be made between droop and  
acquisition time, or error voltage VE.  
CIN  
RIN  
AIN  
TO  
SHA  
Figure 24a. Clamp Operation  
Clamp Circuit Example  
A single supply video amplifier outputs a level-shifted video  
signal between 2 and 3 volts with the following parameters:  
AIN  
0
0
F
F
REFTF  
REFTS  
horizontal period = 63.56 µs,  
horizontal sync interval = 10.9 µs,  
horizontal sync pulse = 4.7 µs,  
sync amplitude = 0.3 volts,  
1
F
0F  
AD9200  
REFBF  
REFBS  
video amplitude of 0.7 volts,  
reference black level = 2.3 volts  
AVDD  
2
MODE  
CLAMP  
The video signal must be dc restored from a 2- to 3-volt range  
down to a 1- to 2-volt range. Configuring the AD9200 for a  
one volt input span with an input range from 1 to 2 volts (see  
Figure 24), the CLAMPIN voltage can be set to 1 volt with an  
external voltage or by direct connection to REFBS. The CLAMP  
pulse may be applied during the SYNC pulse, or during the  
SHORT TO REFBS  
OR EXTERNAL DC  
CLAMPIN  
Figure 24b. Video Clamp Circuit  
REV. E  
–13–