DIGITAL SPECIFICATIONS
Parameter
LOGIC INPUT
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
(V
IH
= DV
DD
)
Low Level Input Current
(V
IL
= 0 V)
Logic Input Capacitance
LOGIC OUTPUTS
High Level Output Current
OE
= DV
SS
, V
OH
= DV
DD
–0.5 V
OE
= DV
DD
, V
OH
= DV
DD
Low Level Output Current
OE
= DV
SS
, V
OL
= 0.4 V
OE
= DV
DD
, V
OL
= 0 V
(T
A
= +25 C with AV
DD
, DV
DD
= +5 V, AV
SS
, DV
SS
= 0 V, V
RT
= 2.6 V, V
RB
= +0.6 V,
CLOCK = 20 MHz unless otherwise noted)
Symbol
V
IH
V
IL
I
IH
I
IL
C
IN
DV
DD
5.0
5.0
5.25
5.25
–5
5
Min
4.0
1.0
5
AD775J
Typ
Max
AD775
Units
V
V
µA
µA
pF
I
OH
I
OZ
I
OL
I
OZ
4.75
5.25
4.75
5.25
3.7
–1.1
16
mA
µA
mA
µA
16
TIMING SPECIFICATIONS
Symbol
Maximum Conversion Rate
Clock Period
Clock High
Clock Low
Output Delay
Pipeline Delay (Latency)
Sampling Delay
Aperture Jitter
Specifications subject to change without notice.
SAMPLE N
VIN
SAMPLE N+1
SAMPLE N+2
Min
20
50
25
25
Typ
35
Max
Units
MHz
ns
ns
ns
ns
Clock Cycles
ns
ps
t
C
t
CH
t
CL
t
OD
t
DS
18
4
30
30
2.5
t
DS
t
CH
CLK
t
CL
t
C
t
OD
OUT
DATA N-3
DATA N-2
DATA N-1
DATA N
Figure 1. AD775 Timing Diagram
REV. 0
–3–
AD [ ANALOG DEVICES ]
