AD5382
AD5382-3 SPECIFICATIONS
Table 4. AV
DD
= 2.7 V to 3.6 V; DV
DD
= 2.7 V to 5.5 V, AGND = DGND = 0 V; external REFIN = 1.25 V;
all specifications T
MIN
to T
MAX
, unless otherwise noted
Parameter
ACCURACY
Resolution
Relative Accuracy
(INL)
Differential Nonlinearity (DNL)
Zero-Scale Error
Offset Error
Offset Error TC
Gain Error
Gain Temperature Coefficient
DC Crosstalk
REFERENCE INPUT/OUTPUT
Reference Input
Reference Input Voltage
DC Input Impedance
Input Current
Reference Range
Reference Output
Output Voltage
Reference TC
OUTPUT CHARACTERISTICS
Output Voltage Range
Short-Circuit Current
Load Current
Capacitive Load Stability
R
L
= ∞
R
L
= 5 kΩ
DC Output Impedance
MONITOR PIN (MON OUT)
Output Impedance
Three-State Leakage Current
LOGIC INPUTS (EXCEPT SDA/SCL)
V
IH
, Input High Voltage
V
IL,
Input Low Voltage
Input Current
Pin Capacitance
LOGIC INPUTS (SDA, SCL ONLY)
V
IH
, Input High Voltage
V
IL
, Input Low Voltage
I
IN
, Input Leakage Current
V
HYST
, Input Hysteresis
C
IN
, Input Capacitance
Glitch Rejection
1.247/1.253
2.43/2.57
±10
±15
0/AV
DD
40
±1
200
1000
0.5
500
100
2
0.8
±10
10
0.7 DV
DD
0.3 DV
DD
±1
0.05 DV
DD
8
50
V min/max
V min/max
ppm/°C max
ppm/°C max
V min/max
mA max
mA max
pF max
pF max
Ω max
Ω typ
nA typ
DV
DD
= 2.7 V to 3.6 V
V min
V max
µA max
pF max
V min
V max
µAmax
V min
pF typ
ns max
AD5382-3
14
±4
–1/+2
4
±4
±5
±0.024
±0.06
2
0.5
Unit
Bits
LSB max
LSB max
mV max
mV max
µV/°C typ
% FSR max
% FSR max
ppm FSR/°C typ
LSB max
Test Conditions/Comments
Guaranteed monotonic over temperature
Measured at Code 64 in the linear region
At 25 °C
T
MIN
to T
MAX
1.25
1
±10
1 to AV
DD
/2
V
MΩ min
µA max
V min/max
±1% for specified performance
Typically 100 MΩ
Typically ±30 nA
Enabled via CR10 in the AD5382 control register.
CR12 selects the reference voltage.
At ambient. CR12 = 0. Optimized for 1.25 V operation
2.5 V reference selected, CR12 = 1
Temperature Range : +25°C to +85°C
Temperature Range :–40°C to +85°C
Total for all pins. T
A
= T
MIN
to T
MAX
SMBus compatible at DV
DD
< 3.6 V
SMBus compatible at DV
DD
< 3.6 V
Input filtering suppresses noise spikes of less than 50 ns
Rev. 0 | Page 6 of 40
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