AD5382
AD5382 MONITOR FUNCTION
The AD5382 contains a channel monitor function that consists
of a multiplexer addressed via the interface, allowing any chan-
nel output to be routed to this pin for monitoring using an
external ADC. The channel monitor function must be enabled
in the control register before any channels are routed to
MON_OUT. Table 18 contains the decoding information
required to route any channel to MON_OUT. External signals
within the AD5382’s absolute max input range can be connected
to the MON_IN pins and monitored at MON_OUT. Selecting
Channel Address 63 three-states MON_OUT. Figure 41 shows a
typical monitoring circuit implemented using a 12-bit SAR
ADC in a 6-lead SOT-23 package. The controller output port
selects the channel to be monitored, and the input port reads
the converted data from the ADC.
sequence of events when configuring the AD5382 for toggle
mode is
1.
2.
3.
4.
Enable toggle mode for the required channels via the
control register.
Load data to A registers.
Load data to B registers.
Apply LDAC.
TOGGLE MODE FUNCTION
The toggle mode function allows an output signal to be gener-
ated using the LDAC control signal that switches between two
DAC data registers. This function is configured using the SFR
control register as follows. A write with REG1 = REG0 = 0 and
A4–A0 = 01100 specifies a control register write. The toggle
mode function is enabled in groups of eight channels using bits
CR5 to CR2 in the control register. See the AD5382 control
register description. Figure 42 shows a block diagram of toggle
mode implementation. Each of the 32 DAC channels on the
AD5382 contain an A and B data register. Note that the B
registers can only be loaded when toggle mode is enabled. The
AVCC
The LDAC is used to switch between the A and B registers in
determining the analog output. The first LDAC configures the
output to reflect the data in the A registers. This mode offers
significant advantages if the user wants to generate a square
wave at the output of all 32 channels, as might be required to
drive a liquid crystal based variable optical attenuator. In this
case, the user writes to the control register and enables the
toggle function by setting CR5 to CR2 = 1, thus enabling the
four groups of eight for toggle mode operation. The user must
then load data to all 32 A and B registers. Toggling LDAC will
set the output values to reflect the data in the A and B registers.
The frequency of the LDAC determines the frequency of the
square wave output.
Toggle mode is disabled via the control register. The first LDAC
following the disabling of the toggle mode will update the
outputs with the data contained in the A registers.
AVCC
AD780/
ADR431
REFOUT/REFIN
DIN
SYNC
SCLK
AVCC
OUTPUT PORT
MON_IN1
MON_IN2
MON_OUT
VOUT0
AD7476
CS
V
IN
SCLK
SDATA
INPUT PORT
AD5382
VOUT31
AGND
DAC_GND SIGNAL_GND
GND
CONTROLLER
03733-0-011
Figure 41. Typical Channel Monitoring Circuit
Rev. 0 | Page 34 of 40
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