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AD5232BRUZ100 参数 Datasheet PDF下载

AD5232BRUZ100图片预览
型号: AD5232BRUZ100
PDF下载: 下载PDF文件 查看货源
内容描述: 非易失性内存,双256位数字电位计 [Nonvolatile Memory,Dual 256-Position Digital Potentiometer]
分类和应用: 数字电位计
文件页数/大小: 24 页 / 867 K
品牌: AD [ ANALOG DEVICES ]
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AD5232
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates an output voltage pro-
portional to the input voltage applied to a given terminal. For
example, connecting Terminal A to 5 V and Terminal B to GND
produces an output voltage at the wiper that can be any value
from 0 V to 5 V. Each LSB of voltage is equal to the voltage
applied across Terminal A to Terminal B, divided by the 2
N
position resolution of the potentiometer divider. The general
equation defining the output voltage with respect to ground for
any given input voltage applied to Terminal A to Terminal B is
A
Data Sheet
RDAC
10kΩ
B
C
A
45pF
C
W
60pF
C
B
45pF
W
Figure 43. RDAC Circuit Simulation Model for RDACx = 10 kΩ
The following code provides a macro model net list for the
10 kΩ RDAC:
.PARAM DW=255, RDAC=10E3
*
.SUBCKT DPOT (A,W,B)
*
CA A 0 {45E-12}
RAW A W {(1-DW/256)*RDAC+50}
CW W 0 60E-12
RBW W B {DW/256*RDAC+50}
CB B 0 {45E-12}
*
.ENDS DPOT
R
(
D
)
R
(
D
)
V
W
(
D
)
=
WB
×
V
A
+
WA
×
V
B
R
AB
R
AB
where R
WB
(D) can be obtained from Equation 1 and R
WA
(D)
can be obtained from Equation 2.
(3)
Operation of the digital potentiometer in the divider mode
results in more accurate operation over temperature. Here the
output voltage is dependent on the ratio of the internal resistors,
not the absolute value; therefore, the drift improves to 15 ppm/°C.
There is no voltage polarity restriction between Terminal A,
Terminal B, and Wiper Terminal W as long as the terminal voltage
(V
TERM
) stays within V
SS
< V
TERM
< V
DD
.
OPERATION FROM DUAL SUPPLIES
The
can be operated from dual supplies, enabling
control of ground-referenced ac signals (see Figure 42 for
a typical circuit connection).
+2.5V
V
DD
SS
CS
CLK
SDI
V
DD
±2V p-p
±1V p-p
APPLICATION PROGRAMMING EXAMPLES
The command sequence examples shown in Table 14 to Table 18
have been developed to illustrate a typical sequence of events
for the various features of the
nonvolatile digital poten-
tiometer. Table 14 illustrates setting two digital potentiometers
to independent data values.
Table 14.
SDI
0xB140
0xB080
SDO
0xXXXX
0xB140
Action
Loads 0x40 data into the RDAC2 register;
Wiper W2 moves to 1/4 full-scale position.
Loads 0x80 data into the RDAC1 register;
Wiper W1 moves to 1/2 full-scale position.
MicroConverter
SCLK
MOSI
GND
GND
AD5232
V
SS
02618-042
–2.5V
followed by a save to nonvolatile memory (PCB calibrate).
Table 15.
SDI
0xB040
0xE0XX
0xE0XX
SDO
0xXXXX
0xB040
0xE0XX
Action
Loads 0x40 data into the RDAC1 register;
Wiper W1 moves to 1/4 full-scale position.
Increments the RDAC1 register by 1, to 0x41;
Wiper W1 moves one resistor segment
away from Terminal B.
Increments the RDAC1 register by 1, to 0x42;
Wiper W1 moves one more resistor segment
away from Terminal B. Continue until
desired the wiper position is reached.
Saves the RDAC1 register data into the
corresponding nonvolatile EEMEM1
memory: ADDR = 0x0.
Figure 42. Operation from Dual Supplies
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. When
configured as a potentiometer divider, the −3 dB bandwidth of
the
(10 kΩ resistor) measures 500 kHz at half
scale. Figure 14 provides the large signal BODE plot character-
istics of the three resistor versions: 10 kΩ, 50 kΩ, and 100 kΩ (see
0x20XX
0xE0XX
Rev. C | Page 20 of 24
02618-043