ADP2325
Data Sheet
LOW-SIDE POWER DEVICE SELECTION
PROGRAMMING THE UVLO INPUT
The ADP2325 has integrated low-side MOSFET drivers, which
can drive the low-side N-channel MOSFETs (NFETs). The selec-
tion of the low-side N-channel MOSFET affects the dc-to-dc
regulator performance.
The precision enable input can be used to program the UVLO
threshold and hysteresis of the input voltage, as shown in Figure 50.
PVINx
R
The selected MOSFET must meet the following requirements:
TOP_EN
EN CMP
ENx
•
•
Drain source voltage (VDS) must be higher than 1.2 × VIN.
Drain current (ID) must be greater than 1.2 × ILIMIT_MAX, where
1.2V
R
BOT_EN
I
LIMIT_MAX is the selected maximum current-limit threshold.
1µA 4µA
The ADP2325 low-side gate drive voltage is 5 V. Make sure that
the selected MOSFET can be fully turned on at 5 V.
Figure 50. Programming the UVLO Input
Total gate charge (Qg at 5 V) must be less than 50 nC. Lower Qg
characteristics constitute higher efficiency.
Use the following equation to calculate RTOP_EN and RBOT_EN
:
1.1V ×VIN_RISING −1.2V ×VIN_FALLING
RTOP_EN
=
When the high-side MOSFET is turned off, the low-side MOSFET
carries the inductor current. For low duty cycle applications, the
low-side MOSFET carries the current for most of the period. To
achieve higher efficiency, it is important to select a low on-resist-
ance MOSFET. The power conduction loss for the low-side
MOSFET can be calculated by
1.1 V×5 μA −1.2 V×1 μA
1.2 V×RTOP _ EN
RBOT _ EN
=
VIN _ RISING − RTOP _ EN ×5 μΑ −1.2 V
where:
V
V
IN_RISING is the VIN rising threshold.
IN_FALLING is the VIN falling threshold.
P
FET_LOW = IOUT2 × RDSON × (1 − D)
where RDSON is the on resistance of the low-side MOSFET.
COMPENSATION COMPONENTS DESIGN
Make sure that the MOSFET can handle the thermal dissipation
due to the power loss.
In peak current mode control, the power stage can be simplified
to a voltage controlled current source supplying current to the
output capacitor and load resistor. It is composed of one domain
pole and a zero contributed by the output capacitor ESR. The
control-to-output transfer function is shown in the following
equations:
In some cases, efficiency is not critical for the system; therefore,
the diode can be selected as the low-side power device. The
average current of the diode can be calculated by
IDIODE (AVG) = (1 − D) × IOUT
s
The reverse breakdown voltage rating of the diode must be
greater than the input voltage with an appropriate margin to
allow for ringing, which may be present at the SWx node. A
Schottky diode is recommended because it has a low forward
voltage drop and a fast switching speed.
1+
1+
2×π × fZ
V
OUT (s)
GVD (s) =
= AVI × R×
VCOMP (s)
s
2×π × fP
1
If a diode is used for the low-side device, the ADP2325 must
enable the PFM mode by connecting the MODE pin to ground.
fZ =
2×π × RESR ×COUT
1
Table 10. Recommended MOSFETs
fP =
2×π ×
(
R + RESR ×COUT
)
Vendor
Fairchild
Fairchild
Fairchild
Vishay
Vishay
AOS
Part No.
VDS
ID
RDSON
Qg
FDS8880
FDMS7578
FDS6898A
Si4804CDY
SiA430DJ
AON7402
AO4884L
30 V 10.7 A 12 mΩ
12 nC
8 nC
16 nC
7 nC
5.3 nC
7.1 nC
13.6 nC
where:
VI = 8.33 A/V.
R is the load resistance.
OUT is the output capacitance.
ESR is the equivalent series resistance of the output capacitor.
25 V 14 A
20 V 9.4 A
30 V 7.9 A
20 V 10.8 A 18.5 mΩ
30 V 39 A
40 V 10 A
8 mΩ
14 mΩ
27 mΩ
A
C
R
15 mΩ
16 mΩ
AOS
Rev. 0 | Page 22 of 32
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