ADP2325
Data Sheet
APPLICATIONS INFORMATION
The maximum output voltage for a given input voltage and
INPUT CAPACITOR SELECTION
switching frequency is also limited by the minimum off time
and the maximum duty cycle. The minimum off time is typically
150 ns and the maximum duty is typically 90% in the ADP2325.
The input decoupling capacitor attenuates high frequency noise
on the input and acts as an energy reservoir. This capacitor should
be a ceramic capacitor in the range of 10 µF to 47 µF and must
be placed close to the PVINx pin. The loop composed of this
input capacitor, high-side NFET, and low-side NFET must be
kept as small as possible. The voltage rating of the input capacitor
must be greater than the maximum input voltage. Ensure that the
rms current rating of the input capacitor is larger than that
expressed in following equation:
The maximum output voltage that is limited by the minimum off
time at a given input voltage and frequency can be calculated
using the following equation:
V
OUT_MAX = VIN × (1 − tMIN_OFF × fSW) − (RDSON1 − RDSON2) ×
OUT_MAX × (1 − tMIN_OFF × fSW) − (RDSON2 + RL) × IOUT_MAX
where:
OUT_MAX is the maximum output voltage.
MIN_OFF is the minimum off time.
I
ICIN
= IOUT × D×
(1− D
)
V
t
_rms
OUTPUT VOLTAGE SETTING
IOUT_MAX is the maximum output current.
The output voltage of the ADP2325 can be set by an external
resistor divider using the following equation:
The maximum output voltage that is limited by the maximum
duty cycle at a given input voltage can be calculated using the
following equation:
RTOP
RBOT
VOUT = 0.6× 1+
VOUT_MAX = DMAX × VIN
where DMAX is the maximum duty cycle.
To limit output voltage accuracy degradation due to FBx pin
bias current (0.1 µA maximum) to less than 0.5% (maximum),
ensure that RBOT is less than 30 kΩ. Table 8 provides the recom-
mended resistor divider for various output voltage options.
As the previous equations demonstrate, reducing the switching
frequency alleviates the minimum on time and minimum off time
limitation.
Table 8. Resistor Divider for Various Output Voltages
CURRENT-LIMIT SETTING
VOUT (V)
RTOP
,
1% (kΩ)
RBOT, 1% (kΩ)
The ADP2325 has two selectable current-limit thresholds. Make
sure that the selected current-limit value is larger than the peak
1.0
10
15
1.2
10
10
current of the inductor, IPEAK
.
1.5
15
10
INDUCTOR SELECTION
1.8
20
10
The inductor value is determined by the operating frequency,
input voltage, output voltage, and inductor ripple current. Using
a small inductor provides faster transient response but degrades
efficiency due to larger inductor ripple current, whereas a large
inductor value provides smaller ripple current and better effi-
ciency but results in a slower transient response. Thus, there is a
trade-off between the transient response and efficiency. As a
guideline, the inductor ripple current, ΔIL, is typically set to
one-third of the maximum load current. The inductor value can
be calculated by using the following equation:
2.5
3.3
5.0
47.5
10
22
15
2.21
3
VOLTAGE CONVERSION LIMITATIONS
The minimum output voltage for a given input voltage and
switching frequency is limited by the minimum on time. The
minimum on time of the ADP2325 is typically 130 ns. The
minimum output voltage in CCM mode at a given input voltage
and frequency can be calculated using the following equation:
V
t
OUT_MIN = VIN × tMIN_ON × fSW − (RDSON1 − RDSON2) × IOUT_MIN
MIN_ON × fSW − (RDSON2 + RL) × IOUT_MIN
where:
OUT_MIN is the minimum output voltage.
MIN_ON is the minimum on time.
×
(
VIN
−
VOUT
)
×D
L
=
∆
IL × fSW
where:
V
t
I
V
V
IN is the input voltage.
OUT is the output voltage.
ΔIL is the inductor ripple current.
SW is the switching frequency.
OUT_MIN is the minimum output current.
SW is the switching frequency.
DSON1 is the high-side MOSFET on resistance.
DSON2 is the low-side MOSFET on resistance.
f
R
R
f
D is the duty cycle.
VOUT
D =
RL is the series resistance of the output inductor.
VIN
Rev. 0 | Page 20 of 32
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