Data Sheet
ADP2325
driver turn off until the voltage at the FBx pin is reduced to
0.63 V, at which time the ADP2325 resumes normal operation.
POWER GOOD
The power-good (PGOODx) pin is an active high, open-drain
output that indicates whether the regulator output voltage is
within regulation. Logic high indicates that the voltage at the
FBx pin (and, therefore, the output voltage) is above 90% of the
reference voltage. Logic low indicates that the voltage at the FBx
pin (and, therefore, the output voltage) is below 85% of the
reference voltage. There is a 16-cycle deglitch time between FBx
and PGOODx.
UNDERVOLTAGE LOCKOUT
The UVLO threshold is 4.2 V with 0.5 V hysteresis to prevent
power-on glitches on the device. When the PVIN1 or PVIN2
voltage rises above 4.2 V, Channel 1 or Channel 2 is enabled and the
soft start period initiates. When either PVIN1 or PVIN2 drops
below 3.7 V, it turns off Channel 1 or Channel 2, respectively.
THERMAL SHUTDOWN
OVERVOLTAGE PROTECTION
In the event that the ADP2325 junction temperature exceeds
150°C, the thermal shutdown circuit turns off the regulator. A
15°C hysteresis is included so that the ADP2325 does not recover
from thermal shutdown until the on-chip temperature drops
below 135°C. Upon recovery, soft start initiates prior to normal
operation.
The ADP2325 provides an OVP feature to protect the system
against an output shorting to a higher voltage supply or for
when a strong load transient occurs. If the feedback voltage
increases to 0.7 V, the internal high-side MOSFET and low-side
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