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ACT8938_14 参数 Datasheet PDF下载

ACT8938_14图片预览
型号: ACT8938_14
PDF下载: 下载PDF文件 查看货源
内容描述: [Advanced PMU for Marvell Aspen]
分类和应用:
文件页数/大小: 46 页 / 1008 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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®
ACT8938  
Rev 3, 23-Dec-11  
SYSTEM CONTROL INFORMATION  
Interfacing with the Marvell Aspen  
The ACT8938 is optimized for use in applications  
using the Marvell Aspen processors, supporting  
both the power domains as well as the signal  
interface for these processors.  
the ACT8938 pin names and the Marvell Aspen  
processors pin names are provided. When this is  
done, the Aspen pin names are located after the  
ACT8938 pin names, and are italicized and located  
inside parentheses. For example, VSEL  
(DVS_GPIO) refers to the logic signal applied to the  
ACT8938's VSEL input, identifying that it is driven  
from the Aspen's DVS_GPIO output. Likewise,  
OUT2 (VDD_IO ) refers to ACT8938's OUT2 pin,  
identifying that it is connected to the Aspen's  
VDD_IO power domain.  
While the ACT8938 supports many possible  
configurations for powering these processors, one  
of the most common configurations is detailed in  
this datasheet. In general, this document refers to  
the ACT8938 pin names and functions. However, in  
cases where the description of interconnections  
between these devices benefits by doing so, both  
Table 2:  
ACT8938 and Marvell Aspen Power Domains  
POWER DOMAIN  
ACT8938 CHANNEL  
TYPE  
DEFAULT VOLTAGE  
CURRENT CAPABILITY  
VDD_M  
VDD_IO  
REG1  
REG2  
REG3  
DC/DC  
DC/DC  
DC/DC  
1.8V/1.8V  
3.3V/3.3V  
1.1V/1.0V  
1150mA  
1150mA  
1300mA  
VDD_Core  
AVDD_OSC  
AVDD_PLL  
AVDD_USB  
TBD  
REG4  
LDO  
1.8V  
150mA  
REG5  
REG6  
REG7  
LDO  
LDO  
LDO  
3.3V  
3.3V  
3.3V  
150mA  
320mA  
320mA  
TBD  
Table 3:  
ACT8938 and Marvell Aspen Power Modes  
POWER  
QUIESCENT  
CURRENT  
CONTROL STATE  
MODE  
POWER DOMAIN STATE  
PWRHLD is asserted, nHIB is de-asserted,  
REG6 and REG7 are enabled by I2C  
REG1, REG2, REG3, REG4, REG5,  
REG6 and REG7 are all on  
ALL ON  
420µA  
PWRHLD is asserted, nHIB is de-asserted,  
REG6 and REG7 are disabled by I2C  
REG1, REG2, REG3, REG4 and  
REG5 are on. REG6 and REG7 are off  
NORMAL  
350µA  
150µA  
PWRHLD is asserted, nHIB is asserted,  
FRC_ON1[ ] is 1, REG6 and REG7 are  
disabled by I2C  
REG1 is on. REG2,REG3,REG4,REG5,  
REG6 and REG7 are off  
Hibernate  
ALL OFF  
PWRHLD is de-asserted, nHIB is  
asserted, REG6 and REG7 are disabled by  
I2C  
REG1, REG2, REG3, REG4, REG5,  
REG6 and REG7 are all off  
<18µA  
Innovative PowerTM  
- 28 -  
www.active-semi.com  
Active-Semi ProprietaryFor Authorized Recipients and Customers  
ActivePMUTM and ActivePathTM are trademarks of Active-Semi.  
I2CTM is a trademark of NXP.  
Copyright © 2011 Active-Semi, Inc.  
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