ACT81460
Rev 1.0, 18-Dec-2018
SLEEP and DPSLP State Configurability
operation. The IC also monitors the VSYS output. When
VSYS rises above its POR (~1.4V), the IC wakes up and
allows I2C communication. The outputs will not turn on
until VSYS rises above UVLO (~2.5V). VSYS also has
a UV Warning threshold that is I2C programmable be-
tween 1.85V and 3.35V. The IC asserts the nIRQ pin
low if VSYS drops below the programmed threshold, but
the outputs continue to operate normally. The IC turns
off all outputs if VSYS drops below UVLO. I2C bit
VSYSSTAT = 1 when VSYS < UV Warning and 0 when
VSYS > UV Warning. This fault can be masked with I2C
bit VSYSMSK.
The ACT81460 provides highly configurable low power
modes that allow the user to fully optimize their system
in any operating condition. This allows the user to con-
figure the IC for many different microprocessor needs.
The SLEEP and DPSLP states allow the user to opti-
mize system efficiency. The configuration can be rede-
fined prior to each time the states are entered. If the
configuration is left unchanged, entering the state re-
sults in the same IC behavior every time SLEEP/DPSLP
mode is activated. SLEEP/DPSLP can also be config-
ured differently before entering the state each time and
this empowers the user to control and change the
SLEEP/DPSLP behavior by firmware in a variety of per-
mutations and combinations. This gives the user im-
mense control via firmware to configure the system
state and behavior during low power states.
Pushbutton Functionality
The ACT81460 nPBIN pin is a multi-functional input pin.
It provides multiple system level functions based on its
impedance to ground and “press” time. Power On and
Power Cycle1 are typically implemented with a single
normally open, momentary pushbutton switch to ground
through 50kΩ. Power Off and Power Cycle2 are typi-
cally implemented with a single normally open, momen-
tary pushbutton switch or a “pin hole” pushbutton to
ground through 1kΩ.
Each regulator’s I2C SLEEP EN bit determines if that
regulator is on or off in the SLEEP state. When the
SLEEP EN bit = 0, that output ignores the SLEEP state.
When the SLEEP EN bit = 1, that output responds to the
SLEEP state. The same is true for each regulator’s
DPSLP EN bit.
Power On – This sequence starts up the IC and turns
the outputs on. Initiate Power On by momentarily pulling
nPBIN to ground through a 50kΩ resistor. The IC moves
to the START POWER SEQUENCE and then starts
turning on the outputs after a 32ms debounce time. The
nPBIN pin must remain asserted for longer than the I2C
PB_WAIT_TIME_SET register value for the IC to
startup and move to the POWER ON state. The nPBIN
wait time can be set to 32ms, 500ms, 1000ms, or
2000ms. If nPBIN is deasserted or a fault is detected
before the wait time expires, the IC turns off the outputs
and moves back to the POWER OFF state. Note that
nPBIN remains asserted for > 8s, the IC follows the
standard behavior described below.
SYSTEM FUNCTIONS
Startup/Shutdown
When power is applied, the IC enters the POWER OFF
state and stays there indefinitely. This results in a very
low power state. The IC starts up and sequences on the
regulators when the user actively initiates a power on by
either asserting nPBIN pin or by writing a 0 into the I2C
POWER OFF bit. When powering on with the nPBIN pin,
any fault that occurs before nPBIN is released transi-
tions the IC back to the POWER OFF state. Any faults
that occur after nPBIN is released and the IC is in the
ACTIVE state are handled per the proper fault detection
procedure as programmed by the IC’s specific CMI.
Once in the ACTIVE state, the IC can stay in that state
or automatically transition to either the SLEEP or
DPSLP state depending on the status of the inputs in
Tables 1 and 2.
Power Cycle1 – This sequence momentarily turns all
outputs off and automatically restarts them. Initiate
Power Cycle1 by momentarily pulling nPBIN to ground
through a 50kΩ resistor for >8s, but <12s. When nPBIN
transitions back high, the IC transitions from its current
operating state to the POWER OFF state for 0.5s. It
then transitions to the START POWER SEQUENCE
state for 0.5s before going to the POWER ON state. If
nPBIN is pulled low for <8s, no action is taken.
Shutdown is typically accomplished by forcing the sys-
tem to transition to the DPSLP state. Shutdown can also
be accomplished with the nPBIN pin or by setting the
I2C POWER OFF bit to a 1.
Power Off (Long Pushbutton Press) – This sequence
turns all outputs off, and they stay off until the user ac-
tively initiates a Power On sequence. Initiate the Power
Off sequence by pulling nPBIN to ground through a
50kΩ resistor for >12s. After 12s, the IC transitions from
its current operating state to the POWER OFF state and
turns all outputs off. Once in the POWER OFF state and
Input Voltage Monitoring (VIN and VSYS
UVLO)
The ACT81460 monitors the input voltage on the VIN
pin to ensure it is within specified limits for system level
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