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ACT81460VM101-T 参数 Datasheet PDF下载

ACT81460VM101-T图片预览
型号: ACT81460VM101-T
PDF下载: 下载PDF文件 查看货源
内容描述: [Low Power PMIC With Integrated Linear Charger]
分类和应用: 集成电源管理电路
文件页数/大小: 60 页 / 5215 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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ACT81460  
Rev 1.0, 18-Dec-2018  
START POWER SEQUENCE State  
such as fault conditions. Any changes to these registers  
are lost when power is recycled. The default values are  
fixed and cannot be changed by the factory or the end  
user.  
The START POWER SEQUENCE state is a transitional  
state to power on the regulators. The IC is not intended  
to operate in this state. When entering START POWER  
SEQUENCE from the SLEEP and DPSLP states, the IC  
transitions to the POWER ON state after all regulators  
are in regulation.  
Basic Non-Volatile – These are R/W and RO. After the  
IC is powered, the user can modify the R/W register val-  
ues to change IC functionality. Changes in functionality  
include things like output voltage settings, startup delay  
time, and current limit thresholds. Any changes to these  
registers are lost when power is recycled. The default  
values can be modified at the factory to optimize IC  
functionality for specific applications. Please consult  
sales@active-semi.com for custom options and mini-  
mum order quantities.  
When entering START POWER SEQUENCE from the  
POWER OFF state due to an nPBIN press, the IC re-  
mains in START POWER SEQUENCE until nPBIN is  
released AND the regulators are in regulation. If nPBIN  
is released before the regulators are in regulation, the  
IC transitions back to the POWER OFF state. If nPBIN  
is still pressed and the regulators enter regulation and  
one of them has a fault before nPBIN is released, the IC  
transitions back to the POWER OFF state.  
When modifying only certain bits within a register, take  
care to not inadvertently change other bits. Inadvert-  
ently changing register contents can lead to unexpected  
IC behavior.  
When entering START POWER SEQUENCE from the  
POWER OFF state due to a power cycle sequence, the  
IC stays in START POWER SEQUENCE for 0.5s before  
exiting to the ACTIVE state.  
STATE MACHINE  
The ACT81460 contains an internal state machine with  
five internal states: POWER OFF, START POWER SE-  
QUENCE, SLEEP/STANDBY, DPSLP (DEEP SLEEP),  
and POWER ON.  
POWER ON State  
The POWER ON state is the main active operating state  
when the input voltage is within the allowable operating  
range and there are no faults. Each power supply and  
load switch output can be programmed to be either ON  
or OFF in this state.  
POWER OFF State  
The POWER OFF state is a PMIC “safe state” or “shut-  
down” state. In this state, all the regulator outputs are  
turned off. The user cannot configure any of the power  
supplies to remain ON in the POWER OFF state and  
this is therefore different from the SLEEP and DPSLP  
states that allows users to configure these states via  
firmware.  
The ACT81460 enters the POWER ON state from  
START POWER SEQUENCE with a normal nPBIN  
startup, an I2C startup, or a power cycle sequence.  
The IC can transition to the SLEEP and DPSLP states  
with proper control of the I2C bits and external GPIO  
inputs. It can transition to the POWER OFF state by set-  
ting the I2C MR bit or by the nPBIN pin.  
The ACT81460 enters POWER OFF at initial power on  
when input power is applied to the IC and VIN is within  
a valid range defined by the VIN_UV and VIN_OV  
thresholds. nRESET is asserted low and all volatile and  
non-volatile registers are reset to defaults. If the input  
voltage drops below the VIN_UV threshold voltage, the  
IC transitions from any other state to the POWER OFF  
state. It is important to note that a transition to POWER  
OFF due to VIN_UV returns all volatile and non-volatile  
registers to their default states. The ACT81460 can also  
enter POWER OFF from any other state due to an  
nPBIN press that initiates the power off sequence. The  
ACT81460 momentarily enters POWER OFF during a  
power cycle sequence. The IC exits the POWER OFF  
state when the I2C bit POWER OFF is cleared to 0, or  
the nPB pin is pulled low for > 32ms  
SLEEP State  
The SLEEP state is a low power mode for the operating  
system. Each output can be programmed to be on or off  
in the SLEEP state. The outputs follow their pro-  
grammed sequencing delay times when turning on or  
off as they enter or exit the SLEEP state. Buck1/2 can  
be programmed to regulate to their VSET0 voltage,  
VSET1 voltage, or be turned off in the SLEEP state. The  
Buck-Boost, LDOs, Load Switches, and Boost con-  
verter can be programmed to regulate to their VSET0  
voltage or can be programmed to be turned off. Note  
that the LDOs, Load Switches, and Boost converter do  
not have a VSET1 voltage.  
The IC enters SLEEP state via I2C register bits SLEEP,  
SLEEP EN, and SLEEP MODE, plus a GPIO input pin.  
Innovative PowerTM  
ActiveSwitcherTM is a trademark of Active-Semi  
www.active-semi.com  
Copyright © 2018 Active-Semi, Inc.  
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