ACT5880
Rev 2, 03-Sep-13
STEP-DOWN DC/DC ELECTRICAL CHARACTERISTICS
(VVP1 = VVP2 = 3.6V, TA = 25°C, unless otherwise specified.)
PARAMETER
CONDITIONS
MIN
2.7
TYP
MAX
6
UNIT
Operating Voltage Range,
VP1, VVP2
V
V
UVLO, VVP1, VVP2
2.5
2.6
2.7
UVLO Hysteresis
100
mV
V
Output Programming Range
0.6
3.9
-1
1
For output ≥1.2V
REG1 or REG2 in buck
mode, IOUT = 10mA
For output <1.2V
-1.5
-1.5
1.5
1.5
Output Voltage Accuracy
Maximum Load Current
%
A
REG2 in LDO mode, LOWIQ[ ] = 0, IOUT = 10mA
The REG1
1.2
0.7
EVENT4[ ]=0, the REG2, buck mode
EVENT4[ ]=1, the REG2, linear mode
0.02
Line Regulation
Load Regulation
0.15
1.7
%/V
V
VPX = Max (VOUT +1V, 3.2V) to 5.5V
Load = 10mA to full maximum load
%/mA
From the I2C last bit latched or PWRHLD set 1
to output changes.
Turn-On Propagation Delay
150
400
2
µs
Soft Start Ramp Time,
REG1 and REG2 buck
mode.
Time between 2 intersection points of the ramp
slope and 2 voltages; 0% and 100% of the final,
no and full load.
Normal operation, is the system oscillator
frequency.
Switch Frequency
Efficiency
1.8
2.2
MHz
REG1, Load = 200mA, VOUT1 = 1.2V
REG2, Load=200mA, VOUT2=1.8V
90
93
OK Threshold to Normal
Ratio
%
OK[ ] asserts 0
93
Switch Frequency Fold-back Switch Frequency folds-back to 1/4 of normal
Voltage Threshold to Normal frequency.
25
65
No Load Current
Shutdown Current
µA
1
Note:
See the TYPICAL PERFORMANCE CHARACTERISTICS for:
The REG1 Soft-Start from Last I2C Bit, Full Load.
The REG1 Soft-Start from PWRHLD Set 1, No Load.
The REG1 Step Transition Response, Full Load.
The REG1 Efficiency Plot.
The REG2 Efficiency Plot.
The REG1 Load Transition Response.
The REG2 Load Transition Response.
The REG2 Buck mode to the Linear Mode Transition.
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