PLUS
ProASIC
Flash Family FPGAs
Table 1-22 • DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V) (Continued)
Commercial/Industrial/
Military/MIL-STD-8831, 2
Symbol
Parameter
Conditions
Min.
–10
Typ.
Max.
10
Units
µA
IOZ
Tristate
Current
Output
Leakage VOH = GND or VDD
Std.
–F3, 5
–10
100
µA
IOSH
Output Short Circuit Current
High
3.3 V High Drive (OB33P)
3.3 V Low Drive (OB33L)
VIN = GND
VIN = GND
–200
–100
IOSL
Output Short Circuit Current
Low
3.3 V High Drive
3.3 V Low Drive
VIN = VDD
VIN = VDD
200
100
CI/O
I/O Pad Capacitance
10
10
pF
pF
CCLK
Notes:
Clock Input Pad Capacitance
1. All process conditions. Commercial/Industrial: Junction Temperature: –40 to +110°C.
2. All process conditions. Military: Junction Temperature: –55 to +150°C.
3. All –F parts are only available as commercial.
4. No pull-up resistor required.
5. This will not exceed 2 mA total per device.
6. During transitions, the input signal may overshoot to VDDP +1.0 V for a limited time of no larger than 10% of the duty cycle.
7. During transitions, the input signal may undershoot to –1.0 V for a limited time of no larger than 10% of the duty cycle.
v5.2
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ACTEL [ Actel Corporation ]
