MIL-PRF-38535K
APPENDIX A
A.3.5.1 Package. All devices supplied under this appendix except for class Y and class N shall be hermetically
sealed in glass, metal, or ceramic (or combinations of these) packages. No organic or polymeric materials (lacquers,
varnishes, coatings, adhesives, greases, etc.) shall be used inside the microcircuit package unless specifically
detailed in the device specification or drawing (e.g., polyimide interlayer dielectric). Alpha Particle protection is
permitted if permitted by the device specification or drawing. Desiccants may be used in the microcircuit package
(except for class level S devices where they are prohibited) only if each lot is subjected to and passes an internal
water vapor test, TM 1018 of MIL-STD-883, with a limit of 1,000 ppm at +100°C for a sample of 3(0) or 5(1). The
internal moisture content for class level S devices, after completion of all screening, shall not exceed 5,000 ppm at
+100°C. Polymer impregnations (backfill, docking, coating, or other uses of organic or polymeric materials to effect,
improve, or repair the seal) of the microcircuit packages shall not be permitted. Polymer coating used to effect or
improve marking adhesion shall not be applied over lid seal area.
NOTE: Packages containing beryllia shall not be ground, sand blasted, machined, or have other operations
performed on them which shall produce beryllia or beryllium dust. Furthermore, beryllium oxide packages shall not
be placed in acids that shall produce fumes containing beryllium.
A.3.5.1.1 Polymeric materials. All polymeric materials of microcircuits shall meet the requirements of TM 5011 of
MIL-STD-883. Polymeric materials shall be approved by the acquiring or preparing activity.
A.3.5.1.2 Package configurations. Package configurations (e.g., 14-lead flat package, 16-lead DIP, 20-terminal
SQ.CCP, etc.) defined in MIL-STD-1835 shall be in accordance with the case outline of MIL-STD-1835. Package
configurations not defined in MIL-STD-1835 shall be specified in the applicable acquisition document, and require
approval of the acquiring activity.
A.3.5.2 Metals. External metal surfaces shall be corrosion-resistant or shall be plated or treated to resist
corrosion. External leads shall meet the requirements specified in A.3.5.6.
A.3.5.3 Other materials. External parts, elements or coatings including markings shall be inherently non-nutrient to
fungus and shall not blister, crack, outgas, soften, flow or exhibit defects that adversely affect storage, operation,
board assembly (e.g., permanently attached organic bumpers), or environmental capabilities of microcircuits
delivered to this appendix under the specified test conditions.
A.3.5.4 Design documentation. Design, topography, and schematic circuit information for all microcircuits supplied
under this appendix shall be available for review by the acquiring activity and the preparing activity upon request.
Control and traceability of design documentation for all new designs and redesigns shall follow the guidelines of
A.3.5.4.1 through A.3.5.4.4. This design documentation shall be sufficient to depict the physical and electrical
construction of the microcircuits supplied under this appendix, and shall be traceable to the specific part, drawing, or
type numbers to which it applies, and to the production lot(s) and inspection lot codes under which microcircuits are
manufactured and tested so that revisions can be identified.
A.3.5.4.1 Die topography. For semiconductor die (monolithic die or dice for inclusion in multichip microcircuits),
there shall be a photograph, drawing(s), mask list with revisions, or other representation defining the topography of
the elements of the die without the intraconnection pattern.
A.3.5.4.2 Die intraconnection pattern. There shall be an enlarged photograph(s) or transparency of diazotypes of
the mask set to the same scale as the die topography (see A.3.5.4.1) showing the specific intraconnection pattern
used to connect the elements on the die so that elements used and those not used can be easily determined. For
multichip microcircuits, this requirement shall apply to the substrate and all conductor pattern and active or passive
circuit elements deposited thereon, as well as to semiconductor die, as applicable.
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ACTEL [ Actel Corporation ]
