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CY28409ZC 参数 Datasheet PDF下载

CY28409ZC图片预览
型号: CY28409ZC
PDF下载: 下载PDF文件 查看货源
内容描述: 时钟合成器与差分SRC和CPU输出 [Clock Synthesizer with Differential SRC and CPU Outputs]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 16 页 / 218 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28409  
Pin Description  
Pin No.  
Name  
REF(0:1)  
XIN  
Type  
Description  
1, 2  
4
O, SE Reference Clock. 3.3V 14.318-MHz clock output.  
I
Crystal Connection or External Reference Frequency Input. This pin has dual  
functions. It can be used as an external 14.318-MHz crystal connection or as an external  
reference frequency input.  
5
XOUT  
O, SE Crystal Connection. Connection for an external 14.318-MHz crystal output.  
41,44,47  
CPUT(0:2)  
O, DIF CPU Clock Output. Differential CPU clock outputs. See Table 1 for frequency config-  
uration.  
40,43,46  
CPUC(0:2)  
O, DIF CPU Clock Output. Differential CPU clock outputs. See Table 1 for frequency config-  
uration.  
38, 37  
SRCT, SRCC  
O, DIF Differential serial reference clock.  
22,23,26,27 3V66(0:3)  
O, SE 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO.  
O, SE 48-/66-MHz Clock Output. 3.3V selectable through SMBus to be 66 or 48 MHz.  
O, SE Free-running PCI Output. 33-MHz clocks divided down from 3V66.  
O, SE PCI Clock Output. 33-MHz clocks divided down from 3V66.  
29  
3V66_4VCH  
PCIF(0:2)  
PCI(0:6)  
7,8,9  
12,13,14,  
15,18,19,20  
31,  
32  
USB_48  
DOT_48  
FS_A, FS_B  
IREF  
O, SE Fixed 48-MHz clock output.  
O, SE Fixed 48-MHz clock output.  
51,56  
52  
I
I
3.3V LVTTL input for CPU frequency selection.  
Current Reference. A precision resistor is attached to this pin which is connected to  
the internal current reference.  
21  
50  
49  
35  
PD#  
I, PU 3.3V LVTTL input for Power-Down# active LOW.  
I, PU 3.3V LVTTL input for CPU_STP# active LOW.  
I, PU 3.3V LVTTL input for PCI_STP# active LOW.  
CPU_STP#  
PCI_STP#  
VTT_PWRGD#  
I
3.3V LVTTL input is a level sensitive strobe used to latch the FS_A and FS_B  
inputs (active LOW).  
30  
SDATA  
I/O  
I
SMBus-compatible SDATA.  
SMBus-compatible SCLOCK.  
28  
SCLK  
53  
VSS_IREF  
VDD_A  
GND Ground for current reference.  
PWR 3.3V power supply for PLL.  
GND Ground for PLL.  
55  
54  
VSS_A  
42,48  
45  
VDD_CPU  
VSS_CPU  
VDD_SRC  
VSS_SRC  
VDD_48  
PWR 3.3V power supply for outputs.  
GND Ground for outputs.  
36  
PWR 3.3V power supply for outputs.  
GND Ground for outputs.  
39  
34  
PWR 3.3V power supply for outputs.  
GND Ground for outputs.  
33  
VSS_48  
10,16  
11,17  
24  
VDD_PCI  
VSS_PCI  
VDD_3V66  
VSS_3V66  
VDD_REF  
VSS_REF  
PWR 3.3V power supply for outputs.  
GND Ground for outputs.  
PWR 3.3V power supply for outputs.  
GND Ground for outputs.  
25  
3
PWR 3.3V power supply for outputs.  
GND Ground for outputs.  
6
Rev 1.0,November 22, 2006  
Page 2 of 16