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CY28405OXC 参数 Datasheet PDF下载

CY28405OXC图片预览
型号: CY28405OXC
PDF下载: 下载PDF文件 查看货源
内容描述: CK409兼容的时钟合成器 [CK409-Compliant Clock Synthesizer]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 18 页 / 198 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28405  
MODE Select  
Frequency Select Pins  
The hardware strapping MODE input pin can be used to select  
the functionality of the RESET#/PD# pin. The default (internal  
pull up) configuration is for this pin to function as a RESET#  
Watchdog output. When pulled LOW during device power-up,  
the RESET#/PD# pin will be configured to function as a Power  
Down input pin.  
Host clock frequency selection is achieved by applying the  
appropriate logic levels to FS_A through FS_E inputs prior to  
VTT_PWRGD# assertion (as seen by the clock synthesizer).  
Upon VTT_PWRGD# being sampled low by the clock chip  
(indicating processor VTT voltage is stable), the clock chip  
samples the FS_A through FS_E input values. For all logic  
levels of FS_A through FS_E, VTT_PWRGD# employs a  
one-shot functionality in that once  
a valid low on  
VTT_PWRGD# has been sampled, all further VTT_PWRGD#  
and FS_A through FS_E transitions will be ignored.  
Table 1. Frequency Selection Table  
Input Conditions  
Output Frequency  
PLL Gear  
Constants  
FS_E  
FS_D  
FS_C  
FS_B  
FS_A  
FSEL_4 FSEL_3 FSEL_2 FSEL_1 FSEL_0  
CPU  
100.7  
3V66  
67.1  
PCI  
33.6  
33.4  
36.0  
33.7  
VCO Freq.  
805.6  
(G)  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
24004009.32  
24004009.32  
24004009.32  
24004009.32  
Reserved  
100.2  
66.8  
801.6  
108.0  
72.0  
864.0  
101.2  
67.5  
809.6  
Reserved  
Reserved  
Reserved  
Reserved  
125.7  
Reserved  
Reserved  
Reserved  
Reserved  
62.9  
Reserved Reserved  
Reserved Reserved  
Reserved Reserved  
Reserved Reserved  
Reserved  
Reserved  
Reserved  
31.4  
32.6  
33.4  
33.6  
33.6  
37.0  
754.2  
781.6  
801.6  
805.2  
807.0  
888.0  
32005345.76  
32005345.76  
32005345.76  
32005345.76  
32005345.76  
32005345.76  
Reserved  
130.3  
65.1  
133.6  
66.8  
134.2  
67.1  
134.5  
67.3  
148.0  
74.0  
Reserved  
Reserved  
Reserved  
Reserved  
167.4  
Reserved  
Reserved  
Reserved  
Reserved  
55.8  
Reserved Reserved  
Reserved Reserved  
Reserved Reserved  
Reserved Reserved  
Reserved  
Reserved  
Reserved  
27.9  
28.3  
29.2  
30.0  
30.8  
31.7  
33.6  
33.5  
33.5  
669.6  
680.0  
700.0  
720.0  
740.0  
760.0  
807.2  
803.4  
803.6  
48008018.65  
48008018.65  
48008018.65  
48008018.65  
48008018.65  
48008018.65  
24004009.32  
32005345.76  
48008018.65  
Reserved  
170.0  
56.7  
175.0  
58.3  
180.0  
60.0  
185.0  
61.7  
190.0  
63.3  
100.9  
67.3  
133.9  
67.0  
200.9  
67.0  
Reserved  
100.0  
Reserved  
66.7  
Reserved Reserved  
33.3  
33.3  
33.3  
800.0  
800.0  
800.0  
24004009.32  
32005345.76  
48008018.65  
Reserved  
133.3  
66.7  
200.0  
66.7  
Reserved  
Reserved  
Reserved Reserved  
Rev 1.0,November 20, 2006  
Page 3 of 18