欢迎访问ic37.com |
会员登录 免费注册
发布采购

CY28405OXC 参数 Datasheet PDF下载

CY28405OXC图片预览
型号: CY28405OXC
PDF下载: 下载PDF文件 查看货源
内容描述: CK409兼容的时钟合成器 [CK409-Compliant Clock Synthesizer]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 18 页 / 198 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28405OXC的Datasheet PDF文件第1页浏览型号CY28405OXC的Datasheet PDF文件第3页浏览型号CY28405OXC的Datasheet PDF文件第4页浏览型号CY28405OXC的Datasheet PDF文件第5页浏览型号CY28405OXC的Datasheet PDF文件第6页浏览型号CY28405OXC的Datasheet PDF文件第7页浏览型号CY28405OXC的Datasheet PDF文件第8页浏览型号CY28405OXC的Datasheet PDF文件第9页  
CY28405  
Pin Description  
Pin No.  
Name  
Type  
O, SE  
I
Description  
1, 2  
REF(0:1)  
Reference Clock. 3.3V 14.318-MHz clock output.  
1, 2, 7, 8, 9 FS_A, FS_B, FS_C,  
FS_D, FS_E  
3.3V LVTTL latched input for CPU frequency selection.  
4
XIN  
I
Crystal Connection or External Reference Frequency Input. This pin  
has dual functions. It can be used as an external 14.318-MHz crystal  
connection or as an external reference frequency input.  
5
XOUT  
O, SE  
Crystal Connection. Connection for an external 14.318-MHz crystal  
output.  
39, 42, 45 CPUT(0:1,ITP)  
38, 41, 44 CPUC(0:1,ITP)  
O, DIF CPU Clock Output. Differential CPU clock outputs.  
O, DIF CPU Clock Output. Differential CPU clock outputs.  
Do Not Connect.  
36, 35  
30, 29  
DNC  
3V66(0:1)  
O, SE  
66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO.  
25  
3V66_3/VCH/SELVCH  
I/O, SE 48- or 66-MHz Clock Output. 3.3V selectable through external SELVCH  
strapping resistor and SMBus to be 66-MHz or 48-MHz. Default is 66-MHz.  
0 = 66 MHz, 1 = 48 MHz  
PD  
26  
3V66_2/MODE  
I/O, SE 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO. Reset or  
PU  
Power-down Mode Select. Selects between RESET# output or PWRDWN#  
input for the PWRDWN#/RESET# pin. Default is RESET#. 0 = PD#, 1 =  
RESET  
7, 8, 9  
PCIF(0:2)  
O, SE  
O, SE  
Free Running PCI Output. 33-MHz clocks divided down from 3V66.  
PCI Clock Output. 33-MHz clocks divided down from 3V66.  
12, 13, 14, PCI(0:5)  
15, 18, 19  
22  
21  
46  
USB_48  
DOT_48  
IREF  
O, SE  
O, SE  
I
Fixed 48-MHz clock output.  
Fixed 48-MHz clock output.  
Current Reference. A precision resistor is attached to this pin which is  
connected to the internal current reference.  
20  
33  
RESET#/PD#  
I/O, PU 3.3V LVTTL input for Power-down# active LOW. Watchdog Timeout  
Reset Output  
VTT_PWRGD#  
I
3.3V LVTTL input is a level sensitive strobe used to latch the FS[A:E]  
input (active LOW).  
32  
31  
48  
47  
SDATA  
SCLK  
VDDA  
VSSA  
I/O  
I
SMBus compatible SDATA.  
SMBus compatible SCLOCK.  
3.3V Power supply for PLL.  
Ground for PLL.  
PWR  
GND  
PWR  
3, 10, 16, VDD(REF,PCI,48,3V66,C  
24, 27, 34, PU,ITP)  
40  
3.3V Power supply for outputs.  
6, 11, 17, VSS(REF,PCI,48,3V66,  
23, 28, 37, CPU,ITP)  
43  
GND  
Ground for outputs.  
Rev 1.0,November 20, 2006  
Page 2 of 18