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CY28405OXC 参数 Datasheet PDF下载

CY28405OXC图片预览
型号: CY28405OXC
PDF下载: 下载PDF文件 查看货源
内容描述: CK409兼容的时钟合成器 [CK409-Compliant Clock Synthesizer]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 18 页 / 198 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28405  
Byte 7: Vendor ID  
Bit @Pup  
Name  
Name  
Description  
Description  
0
0
Vendor ID Bit 0  
Byte 8: Control Register 8  
Bit  
7
@Pup  
0
1
1
CPU  
PCIF  
PCI  
Spread Spectrum Selection  
‘000’ = 0.20% triangular  
‘001’ = + 0.12, – 0.62%  
‘010’ = + 0.25, – 0.75%  
6
5
3V66  
‘011’ = –0.05, – 0.45% triangular  
‘100’ = 0.25%  
‘101’ = + 0.00, – 0.50%  
‘110’ = 0.5%  
‘111’ = 0.38%  
4
3
2
1
0
0
0
0
0
0
FSEL_4  
FSEL_3  
FSEL_2  
FSEL_1  
FSEL_0  
SW Frequency selection bits. See Table 1.  
Byte 9: Control Register 9  
Bit  
@Pup  
Name  
Description  
7
0
PCIF  
PCIF Clock Output Drive Strength Control  
0 = Low Drive strength, 1 = High Drive strength  
6
5
4
3
2
0
0
1
PCI  
PCI Clock Output Drive Strength  
0 = Low Drive strength, 1 = High Drive strength  
3V66  
3V66 Clock Output Drive Strength  
0 = Low Drive strength, 1 = High Drive strength  
REF  
REF Clock Output Drive Strength  
0 = Low Drive strength, 1 = High Drive strength  
1
(‘404: 1)  
Reserved  
Reserved  
Reserved  
1
Reserved  
(Reserved for CY28404:  
REF2  
(Reserved for CY28404:  
REF2 Output Enable  
0 = Disabled, 1 = Enabled)  
1
0
0
0
Reserved  
Reserved  
Vendor Test Mode (always program to 0) PLL Bypass Test  
Vendor Test Mode (always program to 0) PLL Leakage Test  
Byte 10: Control Register 10  
Bit  
7
@Pup  
Name  
PCI_Skew1  
Description  
0
0
PCI skew control  
00 = Normal  
01 = –500 ps  
10 = Reserved  
11 = +500 ps  
6
PCI_Skew0  
5
4
0
0
3V66_Skew1  
3V66_Skew0  
3V66 skew control  
00 = Normal  
01 = –150 ps  
10 = +150 ps  
11 = +300 ps  
3
2
1
1
Reserved  
Reserved  
Reserved, Set = 1  
Reserved, Set = 1  
Rev 1.0,November 20, 2006  
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