CY28372
Byte 5 (continued)
Bit
@Pup
Name
Description
Bit 3
Bit 2
Bit 1
Bit 0
HW
HW
HW
HW
Latched FS3 input
Latched FS2 input
Latched FS1 input
Latched FS0 input
Latched FS[3:0] inputs. These bits are read-only.
Byte 6
Bit
@Pup
Name
Reserved
Reserved
PCIF0
Description
Bit 7
Bit 6
Bit 5
0
0
0
Reserved
Reserved
PCIF0 functionality when PCI_STP# is LOW
0: Free running, 1: Stop
Bit 4
Bit 3
Bit 2
0
1
0
PCIF1
PCIF1 functionality when PCI_STP# is LOW
0: Free running, 1: Stop
CPUT0/CPUC0
CPUT1
CPU[T/C]0 functionality when CPU_STP# is LOW
0: Free running, 1: Stop (three-state)
CPUT1 functionality when CPU_STP# is LOW
0: Free running, 1: Stop (three-state)
Bit 1
Bit 0
1
1
CPUT0/CPUC0
CPUT1
CPU[T/C]0 Output Enable/Disable
CPUT1 Output Enable/Disable
Byte 7
Bit
@Pup
Name
PCIF1
Description
PCIF1 Output Enable/Disable
PCIF0 Output Enable/Disable
PCI_5 Output Enable/Disable
PCI_4 Output Enable/Disable
PCI_3 Output Enable/Disable
PCI_2 Output Enable/Disable
PCI_1 Output Enable/Disable
PCI_0 Output Enable/Disable
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
1
1
1
1
1
1
PCIF0
PCI_5
PCI_4
PCI_3
PCI_2
PCI_1
PCI_0
Byte 8
Bit
Bit 7
@Pup
Name
Vendor_ID3
Pin Description
1
0
0
0
0
0
0
0
Bit[3] of Cypress Semiconductor’s Vendor ID. This bit is read only.
Bit[2] of Cypress Semiconductor’s Vendor ID. This bit is read only.
Bit[1] of Cypress Semiconductor’s Vendor ID. This bit is read only.
Bit[0] of Cypress Semiconductor’s Vendor ID. This bit is read only.
Revision ID bit[3]
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Vendor_ID2
Vendor _ID1
Vendor _ID0
Revision_ID3
Revision_ID2
Revision_ID1
Revision_ID0
Revision ID bit[2]
Revision ID bit[1]
Revision ID bit[0]
Byte 9
Bit
Bit 7
@Pup
Name
PD#
Description
Power-down Enable
1
0
1
Bit 6
Bit 5
Reserved
48MHz
Reserved
48-MHz Output Control
Rev 1.0,November 20, 2006
Page 6 of 17
SPECTRALINEAR [ SPECTRALINEAR INC ]
