CY28372
Pin Description
Pin #.
Name
Type
Description
6
XIN
I
Crystal Connection or External Reference Frequency Input. This pin has dual
functions. It can be used as an external 14.318-MHz crystal connection or as an
external reference frequency input.
7
XOUT
REF2
O
Crystal Connection. Connection for an external 14.318-MHz crystal. If using an
external reference, this pin must be left unconnected.
4
O
O
I
Reference Clock. 14.31818 reference outputs.
2, 3
REF[0:1]/
FS[0:1]
Reference Clock. 14.31818 reference outputs.
Frequency Select. Sampled upon power-on to determine device operating frequency.
Free-running PCI. Independent of PCI_STP#.
14, 15
PCIF[0:1]/
FS[2:3]
O
I
Frequency Select. Sampled upon power-on to determine device operating frequency.
PCI Clock.
16, 17, 20,
21, 22, 23
PCI [0:5]
O
12
PCI_STP#
I
PCI Stop. Stops all PCI clocks
Differential CPU Outputs.
40
39
CPUT0
CPUC0
O
43
44
CPUT1
CPU_STP#
ZCLK[0:1]
IOAPIC[0:1]
48MHz
O
I
“True” Clock of Differential CPU Outputs. For chipset host bus
CPU Stop. Stops all CPU clocks
9, 10
46, 47
27
O
O
O
O
MuTIOL Clock Outputs.
IOAPIC. 2.5 V clock outputs
48 MHz Clock. USB clock outputs
26
24_48MHz
24 MHz or 48 MHz Clock. Selectable SIO clock outputs. Default output frequency is
24 MHz, but can be configured for 48 MHz through I2C.
31, 30
34
AGP[0:1]
SDATA
SCLK
O
I/O
I
AGP Clock.
I2C Data. 5v tolerant
I2C Clock.5v tolerant
35
33
PD#
I
Power-down Control. Turns off all clock outputs and shuts down device
36
VDDA
GNDA
PWR 3.3V Analog Power/Ground. Power supply for core logic, PLL circuitry
PWR
37
1, 5, 8, 11,
13, 18, 19,
24, 25, 28,
29, 32
VDD_REF,
GND_REF,
GND_Z,
PWR 3.3V Power and Ground. Power supply for respective output buffers.
VDD_Z,
VDD_PCI,
GND_PCI,
GND_48,
VDD_48,
VDD_AGP,
GND_AGP
38, 41, 42
48, 45
VDD_CPU,
GND_CPU,
VDD_APIC,
GND_APIC
PWR 2.5V Power and Ground. Power supply for respective output buffers.
Rev 1.0,November 20, 2006
Page 2 of 17
SPECTRALINEAR [ SPECTRALINEAR INC ]
