PACE1750AE
SIGNAL PROPAGATION DELAYS1,2
20 MHz
30 MHz
40 MHz
Min Max
Min
Max
Min
Max
Symbol
tC(BR)L
tC(BR)H
tBGV(C)
tC(BG)X
tC(BB)L
tC(BB)H
tBBV(C)
tC(BB)X
tC(BL)L
Parameter
Unit
BUS REQ
BUS REQ
BUS GNT
BUS GNT
25
25
25
25
22
22
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
setup
hold
5
5
5
5
5
5
LOW
BUS BUSY
BUS BUSY
BUS BUSY
BUS BUSY
BUS LOCK
BUS LOCK
BUS LOCK
BUS LOCK
24
20
24
20
20
15
HIGH
setup
hold
5
5
5
5
5
5
LOW
HIGH
setup
hold
25
20
25
20
21
17
tC(BL)H
tBLV(C)
tC(BL)X (IN)
5
5
5
5
5
5
D/ Status, AS -AS , AK -AK ,
20
25
20
25
20
20
ns
ns
I
0
3
0
3
tC(ST)V
M/ , R/
IO
W
M/ , R/ , D/ Status,
IO
W
I
tC(ST)X
0
0
0
ns
AS0-AS3, AK0-AK3
STRBA HIGH
STRBA LOW
17
17
17
17
16
16
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tC(SA)H
tC(SA)L
tSAL(IBA)X
tRAV(C)
Address hold from STRBA LOW
RDYA setup
5
5
5
5
5
5
5
5
5
RDYA hold
tC(RA)X
LOW write
STRBD
17
17
17
17
17
17
14
14
14
tC(SDW)L
tC(SD)H
HIGH
STRBD
LOW read
STRBD
tFC(SDR)L
tSDRH(IBD)X
tSDWH(IBD)X
tSDL(SD)H
tRDV(C)
HIGH
STRBD
0
25
26
5
0
25
26
5
0
17
20
5
HIGH
STRBD
write
STRBD
RDYD setup
RDYD hold
5
5
5
tC(RD)X
IB0-IB15
25
25
20
tC(IBA)V
IB0-IB15
0
5
6
0
0
5
6
0
0
5
5
0
tFC(IBA)X
tIBDRV(C)
tC(IBD)X
IB0-IB15 setup
IB0-IB15 hold (read)
Data valid out (write)
tC(IBD)X
Do c um e nt # MICRO-2 REV G
Pa g e 5 o f 25
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
