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ASM2P9940LG-32-LR 参数 Datasheet PDF下载

ASM2P9940LG-32-LR图片预览
型号: ASM2P9940LG-32-LR
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压1:18时钟分配芯片 [Low Voltage 1:18 Clock Distribution Chip]
分类和应用: 时钟驱动器逻辑集成电路
文件页数/大小: 13 页 / 485 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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April 2007  
rev 1.2  
ASM2I9940L  
Table 3. Pin Configuration  
Pin #  
Pin Name  
I/O  
Type  
Function  
5
PECL_CLK  
Input  
LVPECL  
LVPECL Clock Inputs  
6
3
PECL_CLK  
LVCMOS_CLK  
Input  
Input  
LVCMOS LVCMOS Clock Input  
Selects either LVPECL or  
4
LVCMOS_CLK_Sel  
Q0–Q17  
LVCMOS  
LVCMOS input as Clock Source  
32,31,30,28,27,26,24,23,22,  
20,19,18,15,14,13,11,10,9  
Output  
LVCMOS Clock Outputs  
2
GNDI  
GNDO  
VCCI  
Supply  
Supply  
Supply  
Supply  
Core Negative Power Supply  
Output Negative Power Supply  
Core Positive Power Supply  
Output Positive Power Supply  
1,12,17,25  
7,21  
8, 16,29  
VCCO  
Table 4. Absolute Maximum Ratings1  
Symbol  
Parameter  
Min  
Max  
Unit  
VCC  
Supply Voltage  
-0.3  
3.6  
V
VI  
IIN  
Input Voltage  
-0.3  
VCC + 0.3  
±20  
V
Input Current  
mA  
°C  
°C  
TStor  
Ts  
Storage Temperature Range  
Max. Soldering Temperature (10 sec)  
-40  
125  
260  
Static Discharge Voltage  
(As per JEDEC STD22- A114-B)  
TDV  
2
KV  
Note:1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect  
device reliability.  
Low Voltage 1:18 Clock Distribution Chip  
3 of 13  
Notice: The information in this document is subject to change without notice.