ESMT
M13S256328A
AC Timing Parameter & Specifications-continued
-5
Symbol
Unit
Parameter
min
max
tCLmin or tCHmin
-
Half Clock Period
tHP
tQH
ns
ns
DQ-DQS output hold time
t
HP-tQHS
-
-
Data hold skew factor
tQHS
0.5
ns
(for DQS & associated DQ
signals)
ACTIVE to PRECHARGE
command
tRAS
tRC
40
55
70
120Kns
ns
ns
ns
Row Cycle Time
-
-
AUTO REFRESH Row Cycle
Time
tRFC
ACTIVE to READ delay
ACTIVE to WRITE delay
tRCDRD
tRCDWT
20
10
-
-
ns
ns
PRECHARGE command
period
tRP
15
15
-
-
ns
ns
ACTIVE to READ with
AUTOPRECHARGE
command
tRAP
ACTIVE bank A to ACTIVE
bank B command
tRRD
tWR
10
15
2
-
-
-
ns
ns
tCK
Write recovery time
Write data in to READ
command delay
tWTR
Col. Address to Col. Address
delay
tCCD
tREFI
1
-
-
tCK
us
Average periodic refresh
interval
7.8
Write preamble
tWPRE
tWPST
tRPRE
tRPST
0.25
0.4
-
tCK
tCK
tCK
tCK
Write postamble
0.6
1.1
0.6
DQS read preamble
DQS read postamble
0.9
0.4
Clock to DQS write preamble
setup time
tWPRES
0
2
-
-
ns
Load Mode Register /
Extended Mode register
cycle time
tMRD
tCK
Exit self refresh to READ
command
tXSRD
tXSNR
200
75
-
-
tCK
ns
Exit self refresh to
non-READ command
(tWR/tCK
)
Autoprecharge write
recovery+Precharge time
tDAL
+
-
tCK
(tRP/tCK
)
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.2
7/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
