EM73P362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
8-BIT BINARY COUNTER
Write the preset value to the registers
The value of 8-bit binary counter can be presetted by P3 and P5. The value of registers can be loaded into
the 8-bit binary counter when the counter starts counting or occurs overflow. If you write values to the
registers before the next overflow occurs, the preset value can be changed.
Read the count value from the registers
The count value of 8-bit binary counter can be read out from P3 and P5. The value is unstable when you
read out the value during counting. Thus, you must disable the counter before reading out the value.
12-BIT GENERAL COUNTER (TCB)
Write the initial value to the registers
The initial value can be written into the 12-bit counter registers by using STATBL, STATBM and STATBH
instructions. The value of registers can be loaded into the 12-bit binary counter (TCB) and the TCB in
creases one when the 8-bit binary counter overflows.
Read the count value from the registers
The count value of 12-bit binary counter can be read out from the counter registers by using LDATBL,
LDATBM and LDATBH instructions.
20-BIT COUNTER FUNCTION
The 8-bit binary counter is connected to TCB which is one 12-bit general counter and becomes to the 20-
bit counter. The TCB increases one when the 8-bit binary counter overflows and generats an overflow
interrupt (TRGB) when the TCB overflows. In this case, the TCB cannot be used as a 12-bit counter
alone.
FUNCTION OF HIGH SPEED COUNTER
The HTC has three modes which are RFO mode, melody mode and auto load timer mode. In these
mode, the HTC loads the initial values from the counter registers (P3, P5) when it is enabled by P17 and
it also can be auto-reloaded the initial values when it overflows. The HTC is counted by the internal pulse
and the value of TCB increases one when 8-bit binary counter overflows. The TCB can generate an
overflow interrupt (TRGB) when it overflows. The TRGB cannot be generated when the HTC is in the
melody mode or disabled.
The HTC is disabled when the CPU is reseted or in the STOP/IDLE operation mode. Users must enable
it by self when the CPU is waked up.
* This specification are subject to be changed without notice.
11.1.2001
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