C9577
Low EMI Clock Generator/Buffers for Pentium® II Systems
Preliminary
PRODUCT FEATURES
FREQUENCY TABLE
S2
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
CPU
133.3
83.3
75
66.8
124.95
133.3
112
100.2
PCI
33.3
41.65
37.5
33.4
41.65
44.3
37.5
33.4
T
T
T
T
T
T
T
T
T
T
T
T
T
Supports Pentium® and Pentium® II CPU’s.
Designed to meet Intel 440BX chipset specification
4 CPU clocks with isolated power supply
8 PCI clocks
2 48 MHz for USB clock
3 Reference clocks
2 IOAPIC clocks
< 175 pS Max. Skew among CPU clocks.
< 250 pS Max. Skew among PCI clocks.
Smooth frequency switching for jumperless application
48-pin SSOP package
Spread Spectrum for EMI reduction
Power Management support for ACPI applications
Table 1
BLOCK DIAGRAM
XIN
32pF
XBU F
500K
32pF
XO U T
2
PLL1
R in
S0
S1
S2
Pwr_D wn#
C PU _s tp#
PC I_s tp#
SSO N #
SMBW
Sel0
Sel1
Sel2
PD #
C S#
PS#
down#
s prd#
SBW
PLL2
48
R in
VD D
SIO
48/24
1
24/48 MH z
1
VD D I
2
VD D C
c pu
4
VD D
pc i
8
VD D
48MH Z
PC I(_F ,1:7)
C PU (1:4)
IO APIC (1:2)
R EF (1:2)
1
VD D
R EF 3
VD D
PIN ASSIGNMENT
REF1 / SIO
REF2 / SDWN#
VSS
XIN
XOUT
VSS
PCI_F
PCI1
VDD
PCI2
PCI3
VSS
PCI4
PCI5
VDD
PCI6
PCI7
VSS
VDD
VSS
VDD
48MHz
48 / 24 MHz
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VDD
REF3
VDDI
IOAPCI1
IOAPIC2
VSS
SMBW
VDDC
CPU1
CPU2
VSS
VDDC
CPU3
CPU4
VSS
VDD
VSS
PCI_stp#
CPU_stp#
Pwr_Dwn#
SSON#
S0
S1
S2
Fig.1
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
Rev 1.5
4/22/1999
Page 1 of 10