ADS5231
www.ti.com
SBAS295A–JULY 2004–REVISED JANUARY 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION(1)
SPECIFIED
PACKAGE
DESIGNATOR
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
PRODUCT
PACKAGE-LEAD
ADS5231IPAG
Tray, 160
ADS5231
TQFP-64
PAG
–40°C to +85°C
ADS5231IPAG
ADS5231IPAGT Tape and Reel, 250
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage Range, AVDD
Supply Voltage Range, VDRV
Voltage Between AVDD and VDRV
Voltage Applied to External REF Pins
Analog Input Pins(2)
–0.3V to +3.8V
–0.3V to +3.8V
–0.3V to +0.3V
–0.3V to +2.4V
–0.3V to min. [3.3V, (AVDD + 0.3V)]
+100°C
Case Temperature
Operating Free-Air Temperature Range, TA
Lead Temperature
–40°C to +85°C
+260°C
Junction Temperature
+105°C
Storage Temperature
–65°C to +150°C
(1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
(2) The dc voltage applied on the input pins should not go below –0.3V. Also, the dc voltage should be limited to the lower of either 3.3V or
(AVDD + 0.3V). If the input can go higher than +3.3V, then a resistor greater than or equal to 25Ω should be added in series with each
of the input pins. Also, the duty cycle of the overshoot beyond +3.3V should be limited. The overshoot duty cycle can be defined either
as a percentage of the time of overshoot over a clock period, or over the entire device lifetime. For a peak voltage between +3.3V and
+3.5V, a duty cycle up to 10% is acceptable. For a peak voltage between +3.5V and +3.7V, the overshoot duty cycle should not exceed
1%. Any overshoot beyond +3.7V should be restricted to less than 0.1% duty cycle, and never exceed +3.9V.
2
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