GLM COMPLIANT SERIAL INTERFACE CIRCUITS
S2044/S2045
OTHER OPERATING MODES
Loopback
Local loopback requires a S2044 and a S2045 as
shown in Figure 6. When enabled, serial data from
the S2044 transmitter is sent to the S2045 receiver,
where the clock is extracted and the data is
deserialized. The parallel data is then sent to the
subsystem for verification. This loopback mode pro-
vides the capability to perform offline testing of the
interface to guarantee the integrity of the serial chan-
nel before enabling the transmission medium. It also
allows system diagnostics.
Operating Frequency Range
The S2044 and S2045 are optimized for operation at
the Fibre Channel rates of 265.625, 531.25, and
1062.5 Mbit/s. Operation in other than Fibre channel
rates is possible if the rate falls within ±10% of the
nominal rate. REFCLK must be selected to be within
100 ppm of the desired byte or word clock rate.
Test Modes
The TEST pin on the S2044 and the SYNCEN pin on
the S2045 provide a PLL bypass mode that can be
used for operating the digital area of the chip. In this
mode, clock signals are input through the reference
clock pins. This can be used for testing the device
during the manufacturing process or during an off-line
self-test. Sync detection is always enabled in test mode.
6
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
