VT82C686B
ISA Bus Interface (continued)
Signal Name
RFSH#
Pin # I/O Signal Description
E3
IO
Indicates when a refresh cycle is in progress. Also driven by 16-
Refresh.
bit ISA Bus masters to indicate a refresh cycle.
/ GPI10 / GPO10
V14
I
(Rx77[3] = 1)
IRQ0
Interrupt Request 0.
/ GPIOC / CHAS / ATEST
/ MSCK
D5
G4
G3
G2
G1
F5
W11
H4
K3
K4
C5
L1
K5
N4,
M5,
M1,
D3,
H3,
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
(Rx5A[1] = 0) (used for external KBC interrupt)
(typically used for COM2 serial port interrupt)
(typically used for COM1 serial port interrupt)
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
Interrupt Request 1.
Interrupt Request 3.
Interrupt Request 4.
Interrupt Request 5.
Interrupt Request 6.
Interrupt Request 7.
Interrupt Request 8
Interrupt Request 9.
Interrupt Request 10.
Interrupt Request 11.
Interrupt Request 12.
Interrupt Request 14.
Interrupt Request 15.
/ GPI4 / SLPBTN#
(typically used for FDC floppy ctrlr interrupt)
(typically used for LPT parallel port interrupt)
from ext RTC if int RTC disabled (Rx5A[2] = 0)
/ GPI1
IRQ8#
IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15
DRQ7
DRQ6
DRQ5
DRQ3
DRQ2
/ MSDT
(Rx5A[1] = 0)
(typically used for IDE primary chan interrupt)
(typically used for IDE secondary ch interrupt)
/ GPI21,
/ GPI20,
/ GPI19,
/ GPI18,
/ FDCDRQ / SERIRQ
/ GPO24 / USBOC1#
/ GPI17,
Used to request DMA services from the internal DMA
DMA Request.
controller.
DRQ2: Rx68[3] = 0 & Rx75[3] = 1 & Rx75[1] = 0
See also Function 0 Rx77[7]
E2,
L3
I
I
DRQ1
/ GPI16
DRQ0
/ USBIRQB / GPO21
/ THRM#,
N2,
O
Used by the internal DMA controller to indicate that a
request for DMA service has been granted.
DACK7#
Acknowledge.
M3,
L4,
O
O
/ USBIRQA / GPO20,
/ MC97IRQ / GPO19
/ SERIRQ,
DACK6#
DACK5#
DACK5#: Rx77[7] = 0
D2,
G5,
O
O
/ AC97IRQ / GPO18,
/ USBOC0# / GPO25
/ FDCIRQ
DACK3#
DACK2#
DACK2#: Rx68[3] = 0 & Rx75[3] = 1 & Rx75[2] = 0
See also Function 0 Rx77[7], Rx77[3], and Rx58
E1,
L2
H1
V5
U5
O
O
O
O
O
/ IDEIRQB / GPO17,
/ IDEIRQA / GPO16
DACK1#
DACK0#
TC
SPKR
SOE#
Terminal count indicator asserted to DMA slaves.
Output of internal timer/counter 2.
Asserted low when ISA address (SA) is
ISA Address (SA) Output Enable.
Terminal Count.
Speaker Drive.
(default pin function)
/ GPO13
/ MCCS#
valid (deasserted when SDD is valid) when SA and SDD are multiplexed on
SA pins 15-0 (i.e., when SPKR is strapped low to enable the audio interface
pins). SOE# is tied directly to the output enable of 74F245 transceivers that
buffer IDE Secondary Bus data and ISA-address (see SA pins for more
information).
Revision 1.71 June 9, 2000
-19-
Pinouts
ETC [ ETC ]
